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https://github.com/c64scene-ar/llvm-6502.git
synced 2024-12-13 20:32:21 +00:00
Enable machine sinking critical edge splitting. e.g.
define double @foo(double %x, double %y, i1 %c) nounwind {
%a = fdiv double %x, 3.2
%z = select i1 %c, double %a, double %y
ret double %z
}
Was:
_foo:
divsd LCPI0_0(%rip), %xmm0
testb $1, %dil
jne LBB0_2
movaps %xmm1, %xmm0
LBB0_2:
ret
Now:
_foo:
testb $1, %dil
je LBB0_2
divsd LCPI0_0(%rip), %xmm0
ret
LBB0_2:
movaps %xmm1, %xmm0
ret
This avoids the divsd when early exit is taken.
rdar://8454886
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114372 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Evan Cheng
parent
e3c65d1ede
commit
44be1a8d66
@ -35,10 +35,7 @@ using namespace llvm;
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static cl::opt<bool>
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SplitEdges("machine-sink-split",
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cl::desc("Split critical edges during machine sinking"),
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cl::init(false), cl::Hidden);
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static cl::opt<unsigned>
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SplitLimit("split-limit",
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cl::init(~0u), cl::Hidden);
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cl::init(true), cl::Hidden);
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STATISTIC(NumSunk, "Number of machine instructions sunk");
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STATISTIC(NumSplit, "Number of critical edges split");
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@ -311,7 +308,7 @@ MachineBasicBlock *MachineSinking::SplitCriticalEdge(MachineInstr *MI,
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return 0;
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// Avoid breaking back edge. From == To means backedge for single BB loop.
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if (!SplitEdges || NumSplit == SplitLimit || FromBB == ToBB)
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if (!SplitEdges || FromBB == ToBB)
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return 0;
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// Check for backedges of more "complex" loops.
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@ -561,8 +558,6 @@ bool MachineSinking::SinkInstruction(MachineInstr *MI, bool &SawStore) {
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// BreakPHIEdge is true if all the uses are in the successor MBB being
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// sunken into and they are all PHI nodes. In this case, machine-sink must
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// break the critical edge first.
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if (NumSplit == SplitLimit)
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return false;
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MachineBasicBlock *NewSucc = SplitCriticalEdge(MI, ParentBlock,
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SuccToSinkTo, BreakPHIEdge);
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if (!NewSucc) {
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@ -9,12 +9,12 @@ entry:
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volatile store i32 0, i32* %c, align 4
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%0 = volatile load i32* %a, align 4 ; <i32> [#uses=1]
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%1 = icmp eq i32 %0, 0 ; <i1> [#uses=1]
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; CHECK: addiu $4, $zero, 3
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; CHECK: addiu $3, $zero, 0
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%iftmp.0.0 = select i1 %1, i32 3, i32 0 ; <i32> [#uses=1]
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%2 = volatile load i32* %c, align 4 ; <i32> [#uses=1]
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%3 = icmp eq i32 %2, 0 ; <i1> [#uses=1]
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; CHECK: addu $4, $zero, $3
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; CHECK: addu $2, $5, $4
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; CHECK: addiu $3, $zero, 3
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; CHECK: addu $2, $5, $3
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%iftmp.2.0 = select i1 %3, i32 0, i32 5 ; <i32> [#uses=1]
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%4 = add nsw i32 %iftmp.2.0, %iftmp.0.0 ; <i32> [#uses=1]
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ret i32 %4
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@ -5,7 +5,7 @@
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; CHECK: oeq_inff:
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; CHECK: ucomiss
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; CHECK: jae
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; CHECK: jb
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define float @oeq_inff(float %x, float %y) nounwind readonly {
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%t0 = fcmp oeq float %x, 0x7FF0000000000000
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%t1 = select i1 %t0, float 1.0, float %y
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@ -14,7 +14,7 @@ define float @oeq_inff(float %x, float %y) nounwind readonly {
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; CHECK: oeq_inf:
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; CHECK: ucomisd
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; CHECK: jae
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; CHECK: jb
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define double @oeq_inf(double %x, double %y) nounwind readonly {
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%t0 = fcmp oeq double %x, 0x7FF0000000000000
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%t1 = select i1 %t0, double 1.0, double %y
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@ -23,7 +23,7 @@ define double @oeq_inf(double %x, double %y) nounwind readonly {
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; CHECK: une_inff:
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; CHECK: ucomiss
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; CHECK: jb
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; CHECK: jae
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define float @une_inff(float %x, float %y) nounwind readonly {
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%t0 = fcmp une float %x, 0x7FF0000000000000
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%t1 = select i1 %t0, float 1.0, float %y
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@ -32,7 +32,7 @@ define float @une_inff(float %x, float %y) nounwind readonly {
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; CHECK: une_inf:
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; CHECK: ucomisd
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; CHECK: jb
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; CHECK: jae
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define double @une_inf(double %x, double %y) nounwind readonly {
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%t0 = fcmp une double %x, 0x7FF0000000000000
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%t1 = select i1 %t0, double 1.0, double %y
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@ -41,7 +41,7 @@ define double @une_inf(double %x, double %y) nounwind readonly {
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; CHECK: oeq_neg_inff:
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; CHECK: ucomiss
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; CHECK: jae
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; CHECK: jb
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define float @oeq_neg_inff(float %x, float %y) nounwind readonly {
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%t0 = fcmp oeq float %x, 0xFFF0000000000000
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%t1 = select i1 %t0, float 1.0, float %y
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@ -50,7 +50,7 @@ define float @oeq_neg_inff(float %x, float %y) nounwind readonly {
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; CHECK: oeq_neg_inf:
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; CHECK: ucomisd
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; CHECK: jae
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; CHECK: jb
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define double @oeq_neg_inf(double %x, double %y) nounwind readonly {
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%t0 = fcmp oeq double %x, 0xFFF0000000000000
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%t1 = select i1 %t0, double 1.0, double %y
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@ -59,7 +59,7 @@ define double @oeq_neg_inf(double %x, double %y) nounwind readonly {
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; CHECK: une_neg_inff:
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; CHECK: ucomiss
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; CHECK: jb
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; CHECK: jae
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define float @une_neg_inff(float %x, float %y) nounwind readonly {
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%t0 = fcmp une float %x, 0xFFF0000000000000
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%t1 = select i1 %t0, float 1.0, float %y
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@ -68,7 +68,7 @@ define float @une_neg_inff(float %x, float %y) nounwind readonly {
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; CHECK: une_neg_inf:
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; CHECK: ucomisd
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; CHECK: jb
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; CHECK: jae
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define double @une_neg_inf(double %x, double %y) nounwind readonly {
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%t0 = fcmp une double %x, 0xFFF0000000000000
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%t1 = select i1 %t0, double 1.0, double %y
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@ -6,10 +6,11 @@
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; that it's conditionally evaluated.
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; CHECK: foo:
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; CHECK: divsd
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; CHECK-NEXT: testb $1, %dil
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; CHECK-NEXT: jne
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; CHECK-NEXT: je
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; CHECK-NEXT: divsd
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; CHECK-NEXT: ret
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; CHECK: divsd
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define double @foo(double %x, double %y, i1 %c) nounwind {
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%a = fdiv double %x, 3.2
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@ -18,6 +19,24 @@ define double @foo(double %x, double %y, i1 %c) nounwind {
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ret double %z
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}
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; Make sure the critical edge is broken so the divsd is sunken below
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; the conditional branch.
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; rdar://8454886
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; CHECK: split:
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; CHECK-NEXT: testb $1, %dil
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; CHECK-NEXT: je
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; CHECK-NEXT: divsd
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; CHECK-NEXT: ret
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; CHECK: movaps
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; CHECK-NEXT: ret
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define double @split(double %x, double %y, i1 %c) nounwind {
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%a = fdiv double %x, 3.2
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%z = select i1 %c, double %a, double %y
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ret double %z
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}
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; Hoist floating-point constant-pool loads out of loops.
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; CHECK: bar:
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@ -68,9 +87,9 @@ return:
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; Codegen should hoist and CSE these constants.
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; CHECK: vv:
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; CHECK: LCPI2_0(%rip), %xmm0
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; CHECK: LCPI2_1(%rip), %xmm1
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; CHECK: LCPI2_2(%rip), %xmm2
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; CHECK: LCPI3_0(%rip), %xmm0
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; CHECK: LCPI3_1(%rip), %xmm1
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; CHECK: LCPI3_2(%rip), %xmm2
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; CHECK: align
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; CHECK-NOT: LCPI
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; CHECK: ret
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@ -50,9 +50,9 @@ define i32 @f3(i32 %a) {
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ret i32 %2
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}
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; CHECK: f3:
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; CHECK-NEXT: ashr r1, r0, 32
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; CHECK-NEXT: ashr r0, r0, 32
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; CHECK-NEXT: bf r0
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; CHECK-NEXT: ldc r0, 10
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; CHECK-NEXT: bt r1
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; CHECK: ldc r0, 17
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define i32 @f4(i32 %a) {
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@ -61,9 +61,9 @@ define i32 @f4(i32 %a) {
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ret i32 %2
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}
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; CHECK: f4:
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; CHECK-NEXT: ashr r1, r0, 32
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; CHECK-NEXT: ashr r0, r0, 32
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; CHECK-NEXT: bf r0
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; CHECK-NEXT: ldc r0, 17
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; CHECK-NEXT: bt r1
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; CHECK: ldc r0, 10
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define i32 @f5(i32 %a) {
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