Convert uses of std::vector in TargetInstrInfo to SmallVector. This change had to be propoagated down into all the targets and up into all clients of this API.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@54802 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Owen Anderson
2008-08-14 22:49:33 +00:00
parent c0573b13a1
commit 44eb65cf58
21 changed files with 95 additions and 88 deletions

View File

@@ -100,9 +100,10 @@ static bool isAlphaIntCondCode(unsigned Opcode) {
}
}
unsigned AlphaInstrInfo::InsertBranch(MachineBasicBlock &MBB,MachineBasicBlock *TBB,
MachineBasicBlock *FBB,
const std::vector<MachineOperand> &Cond)const{
unsigned AlphaInstrInfo::InsertBranch(MachineBasicBlock &MBB,
MachineBasicBlock *TBB,
MachineBasicBlock *FBB,
const SmallVectorImpl<MachineOperand> &Cond) const {
assert(TBB && "InsertBranch must not be told to insert a fallthrough");
assert((Cond.size() == 2 || Cond.size() == 0) &&
"Alpha branch conditions have two components!");
@@ -315,7 +316,7 @@ static unsigned AlphaRevCondCode(unsigned Opcode) {
// Branch analysis.
bool AlphaInstrInfo::AnalyzeBranch(MachineBasicBlock &MBB,MachineBasicBlock *&TBB,
MachineBasicBlock *&FBB,
std::vector<MachineOperand> &Cond) const {
SmallVectorImpl<MachineOperand> &Cond) const {
// If the block has no terminators, it just falls into the block after it.
MachineBasicBlock::iterator I = MBB.end();
if (I == MBB.begin() || !isUnpredicatedTerminator(--I))
@@ -418,7 +419,7 @@ bool AlphaInstrInfo::BlockHasNoFallThrough(MachineBasicBlock &MBB) const {
}
}
bool AlphaInstrInfo::
ReverseBranchCondition(std::vector<MachineOperand> &Cond) const {
ReverseBranchCondition(SmallVectorImpl<MachineOperand> &Cond) const {
assert(Cond.size() == 2 && "Invalid Alpha branch opcode!");
Cond[0].setImm(AlphaRevCondCode(Cond[0].getImm()));
return false;

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@@ -41,7 +41,7 @@ public:
virtual unsigned InsertBranch(MachineBasicBlock &MBB, MachineBasicBlock *TBB,
MachineBasicBlock *FBB,
const std::vector<MachineOperand> &Cond) const;
const SmallVectorImpl<MachineOperand> &Cond) const;
virtual void copyRegToReg(MachineBasicBlock &MBB,
MachineBasicBlock::iterator MI,
unsigned DestReg, unsigned SrcReg,
@@ -81,12 +81,12 @@ public:
bool AnalyzeBranch(MachineBasicBlock &MBB,MachineBasicBlock *&TBB,
MachineBasicBlock *&FBB,
std::vector<MachineOperand> &Cond) const;
SmallVectorImpl<MachineOperand> &Cond) const;
unsigned RemoveBranch(MachineBasicBlock &MBB) const;
void insertNoop(MachineBasicBlock &MBB,
MachineBasicBlock::iterator MI) const;
bool BlockHasNoFallThrough(MachineBasicBlock &MBB) const;
bool ReverseBranchCondition(std::vector<MachineOperand> &Cond) const;
bool ReverseBranchCondition(SmallVectorImpl<MachineOperand> &Cond) const;
};
}