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Add comments about LSR / ARM.

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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35048 91177308-0d34-0410-b5e6-96231b3b80d8
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Evan Cheng 2007-03-09 19:35:33 +00:00
parent 2265b49193
commit 44f4fca3c0
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4
lib/Target/ARM/README.txt
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@ -463,3 +463,7 @@ More register scavenging work:
resulting live interval is not assigned a physical register. It may be
possible (with the help of the scavenger) to turn some spill / restore
pairs into register copies.
//===---------------------------------------------------------------------===//
Teach LSR about ARM addressing modes.