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Cannot create a result register for non-legal types.

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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@143749 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Chad Rosier 2011-11-04 23:45:39 +00:00
parent 774ec45f3d
commit 451afbc6a2
1 changed files with 2 additions and 1 deletions
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3
lib/Target/ARM/ARMFastISel.cpp
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@ -552,8 +552,9 @@ unsigned ARMFastISel::ARMMaterializeInt(const Constant *C, EVT VT) {
// do so now.
const ConstantInt *CI = cast<ConstantInt>(C);
if (Subtarget->hasV6T2Ops() && isUInt<16>(CI->getZExtValue())) {
EVT SrcVT = MVT::i32;
unsigned Opc = isThumb ? ARM::t2MOVi16 : ARM::MOVi16;
unsigned ImmReg = createResultReg(TLI.getRegClassFor(VT));
unsigned ImmReg = createResultReg(TLI.getRegClassFor(SrcVT));
AddOptionalDefs(BuildMI(*FuncInfo.MBB, FuncInfo.InsertPt, DL,
TII.get(Opc), ImmReg)
.addImm(CI->getSExtValue()));