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Adding the missing implementation for ARM::SBFX and ARM::UBFX.

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Fixing http://llvm.org/bugs/show_bug.cgi?id=7225.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104667 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Shih-wei Liao 2010-05-26 03:21:39 +00:00
parent 174e597d46
commit 45469f38b6
1 changed files with 13 additions and 1 deletions
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14
lib/Target/ARM/ARMCodeEmitter.cpp
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@ -820,11 +820,23 @@ void ARMCodeEmitter::emitDataProcessingInstruction(const MachineInstr &MI,
uint32_t v = ~MI.getOperand(2).getImm();
int32_t lsb = CountTrailingZeros_32(v);
int32_t msb = (32 - CountLeadingZeros_32(v)) - 1;
// Insts[20-16] = msb, Insts[11-7] = lsb
// Instr{20-16} = msb, Instr{11-7} = lsb
Binary |= (msb & 0x1F) << 16;
Binary |= (lsb & 0x1F) << 7;
emitWordLE(Binary);
return;
} else if ((TID.Opcode == ARM::UBFX) || (TID.Opcode == ARM::SBFX)) {
// Encode Rn in Instr{0-3}
Binary |= getMachineOpValue(MI, OpIdx++);
uint32_t lsb = MI.getOperand(OpIdx++).getImm();
uint32_t widthm1 = MI.getOperand(OpIdx++).getImm() - 1;
// Instr{20-16} = widthm1, Instr{11-7} = lsb
Binary |= (widthm1 & 0x1F) << 16;
Binary |= (lsb & 0x1F) << 7;
emitWordLE(Binary);
return;
}
// If this is a two-address operand, skip it. e.g. MOVCCr operand 1.