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While spilling live registers at the end of block check whether they are used by DBG_VALUE machine instructions or not. If a spilled register is used by DBG_VALUE machine instruction then insert a new DBG_VALUE machine instruction to encode variable's new location on stack.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@110235 91177308-0d34-0410-b5e6-96231b3b80d8
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@ -16,6 +16,7 @@
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#include "llvm/BasicBlock.h"
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#include "llvm/BasicBlock.h"
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#include "llvm/CodeGen/MachineFunctionPass.h"
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#include "llvm/CodeGen/MachineFunctionPass.h"
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#include "llvm/CodeGen/MachineInstr.h"
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#include "llvm/CodeGen/MachineInstr.h"
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#include "llvm/CodeGen/MachineInstrBuilder.h"
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#include "llvm/CodeGen/MachineFrameInfo.h"
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#include "llvm/CodeGen/MachineFrameInfo.h"
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#include "llvm/CodeGen/MachineRegisterInfo.h"
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#include "llvm/CodeGen/MachineRegisterInfo.h"
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#include "llvm/CodeGen/Passes.h"
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#include "llvm/CodeGen/Passes.h"
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@ -80,6 +81,8 @@ namespace {
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// that is currently available in a physical register.
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// that is currently available in a physical register.
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LiveRegMap LiveVirtRegs;
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LiveRegMap LiveVirtRegs;
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DenseMap<unsigned, MachineInstr *> LiveDbgValueMap;
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// RegState - Track the state of a physical register.
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// RegState - Track the state of a physical register.
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enum RegState {
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enum RegState {
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// A disabled register is not available for allocation, but an alias may
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// A disabled register is not available for allocation, but an alias may
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@ -265,6 +268,24 @@ void RAFast::spillVirtReg(MachineBasicBlock::iterator MI,
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TII->storeRegToStackSlot(*MBB, MI, LR.PhysReg, SpillKill, FI, RC, TRI);
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TII->storeRegToStackSlot(*MBB, MI, LR.PhysReg, SpillKill, FI, RC, TRI);
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++NumStores; // Update statistics
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++NumStores; // Update statistics
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// If this register is used by DBG_VALUE then insert new DBG_VALUE to
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// identify spilled location as the place to find corresponding variable's
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// value.
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if (MachineInstr *DBG = LiveDbgValueMap.lookup(LRI->first)) {
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const MDNode *MDPtr =
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DBG->getOperand(DBG->getNumOperands()-1).getMetadata();
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int64_t Offset = 0;
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if (DBG->getOperand(1).isImm())
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Offset = DBG->getOperand(1).getImm();
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DebugLoc DL = MI->getDebugLoc();
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if (MachineInstr *NewDV =
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TII->emitFrameIndexDebugValue(*MF, FI, Offset, MDPtr, DL)) {
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MachineBasicBlock *MBB = DBG->getParent();
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MBB->insert(MI, NewDV);
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DEBUG(dbgs() << "Inserting debug info due to spill:" << "\n" << *NewDV);
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LiveDbgValueMap[LRI->first] = NewDV;
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}
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}
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if (SpillKill)
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if (SpillKill)
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LR.LastUse = 0; // Don't kill register again
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LR.LastUse = 0; // Don't kill register again
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}
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}
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@ -761,6 +782,7 @@ void RAFast::AllocateBasicBlock() {
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if (!MO.isReg()) continue;
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if (!MO.isReg()) continue;
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unsigned Reg = MO.getReg();
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unsigned Reg = MO.getReg();
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if (!Reg || TargetRegisterInfo::isPhysicalRegister(Reg)) continue;
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if (!Reg || TargetRegisterInfo::isPhysicalRegister(Reg)) continue;
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LiveDbgValueMap[Reg] = MI;
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LiveRegMap::iterator LRI = LiveVirtRegs.find(Reg);
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LiveRegMap::iterator LRI = LiveVirtRegs.find(Reg);
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if (LRI != LiveVirtRegs.end())
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if (LRI != LiveVirtRegs.end())
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setPhysReg(MI, i, LRI->second.PhysReg);
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setPhysReg(MI, i, LRI->second.PhysReg);
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@ -770,7 +792,7 @@ void RAFast::AllocateBasicBlock() {
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MO.setReg(0); // We can't allocate a physreg for a DebugValue, sorry!
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MO.setReg(0); // We can't allocate a physreg for a DebugValue, sorry!
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else {
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else {
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// Modify DBG_VALUE now that the value is in a spill slot.
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// Modify DBG_VALUE now that the value is in a spill slot.
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uint64_t Offset = MI->getOperand(1).getImm();
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int64_t Offset = MI->getOperand(1).getImm();
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const MDNode *MDPtr =
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const MDNode *MDPtr =
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MI->getOperand(MI->getNumOperands()-1).getMetadata();
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MI->getOperand(MI->getNumOperands()-1).getMetadata();
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DebugLoc DL = MI->getDebugLoc();
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DebugLoc DL = MI->getDebugLoc();
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@ -1004,6 +1026,7 @@ bool RAFast::runOnMachineFunction(MachineFunction &Fn) {
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SkippedInstrs.clear();
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SkippedInstrs.clear();
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StackSlotForVirtReg.clear();
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StackSlotForVirtReg.clear();
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LiveDbgValueMap.clear();
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return true;
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return true;
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}
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}
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