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Implement add.ll:test22, a common case in MSIL files
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@14587 91177308-0d34-0410-b5e6-96231b3b80d8
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@ -122,6 +122,7 @@ namespace {
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Instruction *visitFreeInst(FreeInst &FI);
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Instruction *visitLoadInst(LoadInst &LI);
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Instruction *visitBranchInst(BranchInst &BI);
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Instruction *visitSwitchInst(SwitchInst &SI);
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// visitInstruction - Specify what to return for unhandled instructions...
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Instruction *visitInstruction(Instruction &I) { return 0; }
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@ -3004,6 +3005,23 @@ Instruction *InstCombiner::visitBranchInst(BranchInst &BI) {
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return 0;
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}
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Instruction *InstCombiner::visitSwitchInst(SwitchInst &SI) {
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Value *Cond = SI.getCondition();
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if (Instruction *I = dyn_cast<Instruction>(Cond)) {
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if (I->getOpcode() == Instruction::Add)
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if (ConstantInt *AddRHS = dyn_cast<ConstantInt>(I->getOperand(1))) {
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// change 'switch (X+4) case 1:' into 'switch (X) case -3'
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for (unsigned i = 2, e = SI.getNumOperands(); i != e; i += 2)
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SI.setOperand(i, ConstantExpr::getSub(cast<Constant>(SI.getOperand(i)),
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AddRHS));
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SI.setOperand(0, I->getOperand(0));
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WorkList.push_back(I);
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return &SI;
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}
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}
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return 0;
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}
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void InstCombiner::removeFromWorkList(Instruction *I) {
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WorkList.erase(std::remove(WorkList.begin(), WorkList.end(), I),
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