diff --git a/lib/Target/X86/X86ISelLowering.cpp b/lib/Target/X86/X86ISelLowering.cpp
index 5b0d315a6d0..fab65738f70 100644
--- a/lib/Target/X86/X86ISelLowering.cpp
+++ b/lib/Target/X86/X86ISelLowering.cpp
@@ -7417,11 +7417,12 @@ static SDValue lowerV4F32VectorShuffle(SDValue Op, SDValue V1, SDValue V2,
         if ((ZMask | 1 << V2Index) == 0xF)
           V1 = DAG.getUNDEF(MVT::v4f32);
 
+        unsigned InsertPSMask = (Mask[V2Index] - 4) << 6 | V2Index << 4 | ZMask;
+        assert((InsertPSMask & ~0xFFu) == 0 && "Invalid mask!");
+
         // Insert the V2 element into the desired position.
-        SDValue InsertPSMask =
-            DAG.getIntPtrConstant(Mask[V2Index] << 6 | V2Index << 4 | ZMask);
         return DAG.getNode(X86ISD::INSERTPS, DL, MVT::v4f32, V1, V2,
-                           InsertPSMask);
+                           DAG.getConstant(InsertPSMask, MVT::i8));
       }
     }
 
diff --git a/test/CodeGen/X86/vec_set-3.ll b/test/CodeGen/X86/vec_set-3.ll
index 9823963d61b..043cf96a671 100644
--- a/test/CodeGen/X86/vec_set-3.ll
+++ b/test/CodeGen/X86/vec_set-3.ll
@@ -8,7 +8,7 @@ define <4 x float> @test(float %a) {
 ; CHECK-NEXT:    retl
 ;
 ; CHECK-EXP-LABEL: test:
-; CHECK-EXP:         insertps $285, {{.*}}, %xmm0
+; CHECK-EXP:         insertps $29, {{.*}}, %xmm0
 ; CHECK-EXP-NEXT:    retl
 
 entry: