diff --git a/lib/Target/ARM/ARMInstrInfo.cpp b/lib/Target/ARM/ARMInstrInfo.cpp index 5437c1dda10..4384c288966 100644 --- a/lib/Target/ARM/ARMInstrInfo.cpp +++ b/lib/Target/ARM/ARMInstrInfo.cpp @@ -22,6 +22,10 @@ ARMInstrInfo::ARMInstrInfo() : TargetInstrInfo(ARMInsts, sizeof(ARMInsts)/sizeof(ARMInsts[0])) { } +const TargetRegisterClass *ARMInstrInfo::getPointerRegClass() const { + return &ARM::IntRegsRegClass; +} + /// Return true if the instruction is a register to register move and /// leave the source and dest operands in the passed parameters. /// diff --git a/lib/Target/ARM/ARMInstrInfo.h b/lib/Target/ARM/ARMInstrInfo.h index e75a71d0e26..6318caa8db0 100644 --- a/lib/Target/ARM/ARMInstrInfo.h +++ b/lib/Target/ARM/ARMInstrInfo.h @@ -31,6 +31,10 @@ public: /// virtual const MRegisterInfo &getRegisterInfo() const { return RI; } + /// getPointerRegClass - Return the register class to use to hold pointers. + /// This is used for addressing modes. + virtual const TargetRegisterClass *getPointerRegClass() const; + /// Return true if the instruction is a register to register move and /// leave the source and dest operands in the passed parameters. /// diff --git a/lib/Target/ARM/ARMInstrInfo.td b/lib/Target/ARM/ARMInstrInfo.td index 5ba4deba2e0..9dc596ab462 100644 --- a/lib/Target/ARM/ARMInstrInfo.td +++ b/lib/Target/ARM/ARMInstrInfo.td @@ -67,9 +67,9 @@ def ldr : InstARM<(ops IntRegs:$dst, memri:$addr), "ldr $dst, $addr", [(set IntRegs:$dst, (load iaddr:$addr))]>; -def str : InstARM<(ops IntRegs:$src, IntRegs:$addr), - "str $src, [$addr]", - [(store IntRegs:$src, IntRegs:$addr)]>; +def str : InstARM<(ops IntRegs:$src, memri:$addr), + "str $src, $addr", + [(store IntRegs:$src, iaddr:$addr)]>; def movrr : InstARM<(ops IntRegs:$dst, IntRegs:$src), "mov $dst, $src", []>; diff --git a/lib/Target/ARM/ARMRegisterInfo.cpp b/lib/Target/ARM/ARMRegisterInfo.cpp index 719ce321e0a..67d0b7c801a 100644 --- a/lib/Target/ARM/ARMRegisterInfo.cpp +++ b/lib/Target/ARM/ARMRegisterInfo.cpp @@ -135,10 +135,8 @@ void ARMRegisterInfo::emitPrologue(MachineFunction &MF) const { //sub sp, sp, #NumBytes BuildMI(MBB, MBBI, ARM::subri, 2, ARM::R13).addReg(ARM::R13).addImm(NumBytes); - //add ip, sp, #NumBytes - 4 - BuildMI(MBB, MBBI, ARM::addri, 2, ARM::R12).addReg(ARM::R13).addImm(NumBytes - 4); - //str lr, [ip] - BuildMI(MBB, MBBI, ARM::str, 1, ARM::R14).addReg(ARM::R12); + //str lr, [sp, #NumBytes - 4] + BuildMI(MBB, MBBI, ARM::str, 2, ARM::R14).addImm(NumBytes - 4).addReg(ARM::R13); } void ARMRegisterInfo::emitEpilogue(MachineFunction &MF,