From 46b6c5266ef055acc861b8d086c33fa01ab465bd Mon Sep 17 00:00:00 2001 From: Daniel Dunbar Date: Thu, 2 Jul 2009 01:58:24 +0000 Subject: [PATCH] llvm-mc/x86: Factor out ParseX86Register. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74684 91177308-0d34-0410-b5e6-96231b3b80d8 --- tools/llvm-mc/AsmParser.h | 1 + tools/llvm-mc/MC-X86Specific.cpp | 45 +++++++++++++++++++++++--------- 2 files changed, 33 insertions(+), 13 deletions(-) diff --git a/tools/llvm-mc/AsmParser.h b/tools/llvm-mc/AsmParser.h index 92ff38829fb..ae5c414c03d 100644 --- a/tools/llvm-mc/AsmParser.h +++ b/tools/llvm-mc/AsmParser.h @@ -81,6 +81,7 @@ private: bool ParseX86InstOperands(const char *InstName, MCInst &Inst); bool ParseX86Operand(X86Operand &Op); bool ParseX86MemOperand(X86Operand &Op); + bool ParseX86Register(X86Operand &Op); // Directive Parsing. bool ParseDirectiveDarwinSection(); // Darwin specific ".section". diff --git a/tools/llvm-mc/MC-X86Specific.cpp b/tools/llvm-mc/MC-X86Specific.cpp index c53e2f81efc..71d70804324 100644 --- a/tools/llvm-mc/MC-X86Specific.cpp +++ b/tools/llvm-mc/MC-X86Specific.cpp @@ -42,6 +42,11 @@ struct AsmParser::X86Operand { } Mem; }; + unsigned getReg() const { + assert(Kind == Register && "Invalid access!"); + return Reg.RegNo; + } + static X86Operand CreateReg(unsigned RegNo) { X86Operand Res; Res.Kind = Register; @@ -56,6 +61,12 @@ struct AsmParser::X86Operand { } static X86Operand CreateMem(unsigned SegReg, MCValue Disp, unsigned BaseReg, unsigned IndexReg, unsigned Scale) { + // If there is no index register, we should never have a scale, and we + // should always have a scale (in {1,2,4,8}) if we do. + assert(((Scale == 0 && !IndexReg) || + (IndexReg && (Scale == 1 || Scale == 2 || + Scale == 4 || Scale == 8))) && + "Invalid scale!"); X86Operand Res; Res.Kind = Memory; Res.Mem.SegReg = SegReg; @@ -67,17 +78,24 @@ struct AsmParser::X86Operand { } }; +bool AsmParser::ParseX86Register(X86Operand &Op) { + assert(Lexer.getKind() == asmtok::Register && "Invalid token kind!"); + + // FIXME: Decode register number. + Op = X86Operand::CreateReg(123); + Lexer.Lex(); // Eat register token. + + return false; +} + bool AsmParser::ParseX86Operand(X86Operand &Op) { switch (Lexer.getKind()) { default: return ParseX86MemOperand(Op); case asmtok::Register: - // FIXME: Decode reg #. // FIXME: if a segment register, this could either be just the seg reg, or // the start of a memory operand. - Op = X86Operand::CreateReg(123); - Lexer.Lex(); // Eat register. - return false; + return ParseX86Register(Op); case asmtok::Dollar: { // $42 -> immediate. Lexer.Lex(); @@ -91,13 +109,12 @@ bool AsmParser::ParseX86Operand(X86Operand &Op) { Lexer.Lex(); // Eat the star. if (Lexer.is(asmtok::Register)) { - Op = X86Operand::CreateReg(123); - Lexer.Lex(); // Eat register. + if (ParseX86Register(Op)) + return true; } else if (ParseX86MemOperand(Op)) return true; - // FIXME: Note that these are 'dereferenced' so that clients know the '*' is - // there. + // FIXME: Note the '*' in the operand for use by the matcher. return false; } } @@ -155,21 +172,23 @@ bool AsmParser::ParseX86MemOperand(X86Operand &Op) { unsigned BaseReg = 0, IndexReg = 0, Scale = 0; if (Lexer.is(asmtok::Register)) { - BaseReg = 123; // FIXME: decode reg # - Lexer.Lex(); // eat the register. + if (ParseX86Register(Op)) + return true; + BaseReg = Op.getReg(); } if (Lexer.is(asmtok::Comma)) { Lexer.Lex(); // eat the comma. if (Lexer.is(asmtok::Register)) { - IndexReg = 123; // FIXME: decode reg # - Lexer.Lex(); // eat the register. + if (ParseX86Register(Op)) + return true; + IndexReg = Op.getReg(); Scale = 1; // If not specified, the scale defaults to 1. } if (Lexer.is(asmtok::Comma)) { - Lexer.Lex(); // eat the comma. + Lexer.Lex(); // Eat the comma. // If present, get and validate scale amount. if (Lexer.is(asmtok::IntVal)) {