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[SystemZ] Allow selects with a high-word destination
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@191751 91177308-0d34-0410-b5e6-96231b3b80d8
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@ -2874,6 +2874,7 @@ SystemZTargetLowering::emitStringWrapper(MachineInstr *MI,
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MachineBasicBlock *SystemZTargetLowering::
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EmitInstrWithCustomInserter(MachineInstr *MI, MachineBasicBlock *MBB) const {
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switch (MI->getOpcode()) {
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case SystemZ::Select32Mux:
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case SystemZ::Select32:
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case SystemZ::SelectF32:
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case SystemZ::Select64:
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@ -198,6 +198,7 @@ let Defs = [CC] in {
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// Select instructions
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//===----------------------------------------------------------------------===//
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def Select32Mux : SelectWrapper<GRX32>, Requires<[FeatureHighWord]>;
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def Select32 : SelectWrapper<GR32>;
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def Select64 : SelectWrapper<GR64>;
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@ -287,3 +287,31 @@ define void @f12() {
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i32 1000000000, i32 400000)
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ret void
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}
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; Test selects involving high registers.
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define void @f13(i32 %x, i32 %y) {
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; CHECK-LABEL: f13:
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; CHECK: llihl [[REG:%r[0-5]]], 0
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; CHECK: cije %r2, 0
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; CHECK: iihf [[REG]], 2102030405
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; CHECK: blah [[REG]]
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; CHECK: br %r14
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%cmp = icmp eq i32 %x, 0
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%val = select i1 %cmp, i32 0, i32 2102030405
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call void asm sideeffect "blah $0", "h"(i32 %val)
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ret void
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}
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; Test selects involving low registers.
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define void @f14(i32 %x, i32 %y) {
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; CHECK-LABEL: f14:
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; CHECK: lhi [[REG:%r[0-5]]], 0
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; CHECK: cije %r2, 0
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; CHECK: iilf [[REG]], 2102030405
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; CHECK: blah [[REG]]
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; CHECK: br %r14
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%cmp = icmp eq i32 %x, 0
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%val = select i1 %cmp, i32 0, i32 2102030405
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call void asm sideeffect "blah $0", "r"(i32 %val)
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ret void
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}
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