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Simplify the interface to LiveVariables::addVirtualRegister(Killed|Dead)
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@14997 91177308-0d34-0410-b5e6-96231b3b80d8
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@ -151,11 +151,9 @@ public:
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/// specified register is killed after being used by the specified
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/// specified register is killed after being used by the specified
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/// instruction.
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/// instruction.
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///
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///
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void addVirtualRegisterKilled(unsigned IncomingReg,
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void addVirtualRegisterKilled(unsigned IncomingReg, MachineInstr *MI) {
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MachineBasicBlock *MBB,
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MachineInstr *MI) {
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RegistersKilled.insert(std::make_pair(MI, IncomingReg));
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RegistersKilled.insert(std::make_pair(MI, IncomingReg));
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getVarInfo(IncomingReg).Kills.push_back(std::make_pair(MBB, MI));
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getVarInfo(IncomingReg).Kills.push_back(std::make_pair(MI->getParent(),MI));
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}
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}
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/// removeVirtualRegisterKilled - Remove the specified virtual
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/// removeVirtualRegisterKilled - Remove the specified virtual
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@ -189,11 +187,9 @@ public:
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/// addVirtualRegisterDead - Add information about the fact that the specified
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/// addVirtualRegisterDead - Add information about the fact that the specified
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/// register is dead after being used by the specified instruction.
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/// register is dead after being used by the specified instruction.
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///
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///
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void addVirtualRegisterDead(unsigned IncomingReg,
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void addVirtualRegisterDead(unsigned IncomingReg, MachineInstr *MI) {
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MachineBasicBlock *MBB,
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MachineInstr *MI) {
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RegistersDead.insert(std::make_pair(MI, IncomingReg));
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RegistersDead.insert(std::make_pair(MI, IncomingReg));
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getVarInfo(IncomingReg).Kills.push_back(std::make_pair(MBB, MI));
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getVarInfo(IncomingReg).Kills.push_back(std::make_pair(MI->getParent(),MI));
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}
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}
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/// removeVirtualRegisterDead - Remove the specified virtual
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/// removeVirtualRegisterDead - Remove the specified virtual
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@ -263,7 +263,7 @@ std::vector<LiveInterval*> LiveIntervals::addIntervalsForSpills(
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nI.addRange(start, end);
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nI.addRange(start, end);
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added.push_back(&nI);
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added.push_back(&nI);
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// update live variables
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// update live variables
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lv_->addVirtualRegisterKilled(nReg, mi->getParent(),mi);
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lv_->addVirtualRegisterKilled(nReg, mi);
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DEBUG(std::cerr << "\t\t\t\tadded new interval: "
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DEBUG(std::cerr << "\t\t\t\tadded new interval: "
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<< nI << '\n');
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<< nI << '\n');
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}
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}
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@ -99,7 +99,7 @@ void LiveVariables::HandleVirtRegUse(VarInfo &VRInfo, MachineBasicBlock *MBB,
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"Should have kill for defblock!");
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"Should have kill for defblock!");
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// Add a new kill entry for this basic block.
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// Add a new kill entry for this basic block.
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VRInfo.Kills.push_back(std::make_pair(MBB, MI));
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VRInfo.Kills.push_back(std::make_pair(MI->getParent(), MI));
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// Update all dominating blocks to mark them known live.
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// Update all dominating blocks to mark them known live.
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const BasicBlock *BB = MBB->getBasicBlock();
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const BasicBlock *BB = MBB->getBasicBlock();
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@ -233,7 +233,8 @@ bool LiveVariables::runOnMachineFunction(MachineFunction &MF) {
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assert(VRInfo.DefInst == 0 && "Variable multiply defined!");
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assert(VRInfo.DefInst == 0 && "Variable multiply defined!");
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VRInfo.DefInst = MI;
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VRInfo.DefInst = MI;
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VRInfo.Kills.push_back(std::make_pair(MBB, MI)); // Defaults to dead
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// Defaults to dead
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VRInfo.Kills.push_back(std::make_pair(MI->getParent(), MI));
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} else if (MRegisterInfo::isPhysicalRegister(MO.getReg()) &&
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} else if (MRegisterInfo::isPhysicalRegister(MO.getReg()) &&
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AllocatablePhysicalRegisters[MO.getReg()]) {
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AllocatablePhysicalRegisters[MO.getReg()]) {
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HandlePhysRegDef(MO.getReg(), MI);
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HandlePhysRegDef(MO.getReg(), MI);
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@ -122,7 +122,7 @@ bool PNE::EliminatePHINodes(MachineFunction &MF, MachineBasicBlock &MBB) {
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// each for each incoming block), the "def" block and instruction fields
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// each for each incoming block), the "def" block and instruction fields
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// for the VarInfo is not filled in.
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// for the VarInfo is not filled in.
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//
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//
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LV->addVirtualRegisterKilled(IncomingReg, &MBB, PHICopy);
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LV->addVirtualRegisterKilled(IncomingReg, PHICopy);
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// Since we are going to be deleting the PHI node, if it is the last use
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// Since we are going to be deleting the PHI node, if it is the last use
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// of any registers, or if the value itself is dead, we need to move this
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// of any registers, or if the value itself is dead, we need to move this
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@ -140,7 +140,7 @@ bool PNE::EliminatePHINodes(MachineFunction &MF, MachineBasicBlock &MBB) {
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// Add all of the kills back, which will update the appropriate info...
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// Add all of the kills back, which will update the appropriate info...
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for (unsigned i = 0, e = Range.size(); i != e; ++i)
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for (unsigned i = 0, e = Range.size(); i != e; ++i)
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LV->addVirtualRegisterKilled(Range[i].second, &MBB, PHICopy);
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LV->addVirtualRegisterKilled(Range[i].second, PHICopy);
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}
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}
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RKs = LV->dead_range(MI);
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RKs = LV->dead_range(MI);
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@ -149,7 +149,7 @@ bool PNE::EliminatePHINodes(MachineFunction &MF, MachineBasicBlock &MBB) {
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Range.assign(RKs.first, RKs.second);
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Range.assign(RKs.first, RKs.second);
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LV->removeVirtualRegistersDead(RKs.first, RKs.second);
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LV->removeVirtualRegistersDead(RKs.first, RKs.second);
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for (unsigned i = 0, e = Range.size(); i != e; ++i)
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for (unsigned i = 0, e = Range.size(); i != e; ++i)
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LV->addVirtualRegisterDead(Range[i].second, &MBB, PHICopy);
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LV->addVirtualRegisterDead(Range[i].second, PHICopy);
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}
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}
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}
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}
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@ -251,7 +251,7 @@ bool PNE::EliminatePHINodes(MachineFunction &MF, MachineBasicBlock &MBB) {
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//
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//
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if (!ValueIsLive) {
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if (!ValueIsLive) {
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MachineBasicBlock::iterator Prev = prior(I);
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MachineBasicBlock::iterator Prev = prior(I);
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LV->addVirtualRegisterKilled(SrcReg, &opBlock, Prev);
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LV->addVirtualRegisterKilled(SrcReg, Prev);
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}
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}
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}
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}
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}
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}
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@ -151,10 +151,10 @@ bool TwoAddressInstructionPass::runOnMachineFunction(MachineFunction &MF) {
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// update live variables for regB
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// update live variables for regB
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if (LV->removeVirtualRegisterKilled(regB, &*mbbi, mi))
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if (LV->removeVirtualRegisterKilled(regB, &*mbbi, mi))
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LV->addVirtualRegisterKilled(regB, &*mbbi, prevMi);
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LV->addVirtualRegisterKilled(regB, prevMi);
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if (LV->removeVirtualRegisterDead(regB, &*mbbi, mi))
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if (LV->removeVirtualRegisterDead(regB, &*mbbi, mi))
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LV->addVirtualRegisterDead(regB, &*mbbi, prevMi);
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LV->addVirtualRegisterDead(regB, prevMi);
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}
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}
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// replace all occurences of regB with regA
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// replace all occurences of regB with regA
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