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v4i64 and v8i64 are only synthesizable when NEON is available.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@103855 91177308-0d34-0410-b5e6-96231b3b80d8
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@ -585,10 +585,12 @@ TargetRegisterClass *ARMTargetLowering::getRegClassFor(EVT VT) const {
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// Map v4i64 to QQ registers but do not make the type legal. Similarly map
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// Map v4i64 to QQ registers but do not make the type legal. Similarly map
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// v8i64 to QQQQ registers. v4i64 and v8i64 are only used for REG_SEQUENCE to
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// v8i64 to QQQQ registers. v4i64 and v8i64 are only used for REG_SEQUENCE to
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// load / store 4 to 8 consecutive D registers.
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// load / store 4 to 8 consecutive D registers.
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if (VT == MVT::v4i64)
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if (Subtarget->hasNEON()) {
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return ARM::QQPRRegisterClass;
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if (VT == MVT::v4i64)
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else if (VT == MVT::v8i64)
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return ARM::QQPRRegisterClass;
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return ARM::QQQQPRRegisterClass;
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else if (VT == MVT::v8i64)
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return ARM::QQQQPRRegisterClass;
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}
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return TargetLowering::getRegClassFor(VT);
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return TargetLowering::getRegClassFor(VT);
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}
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}
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