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https://github.com/c64scene-ar/llvm-6502.git
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Mips MC object code emission improvements:
"With this patch we can now generate runnable Mips code through LLVM direct object emission. We have run numerous simple programs, both C and C++ and with -O0 and -O3 from the output. The code is not production ready, but quite useful for experimentation." Patch and message by Jack Carter git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144414 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
@ -18,18 +18,20 @@
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#include "MipsRelocations.h"
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#include "MipsSubtarget.h"
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#include "MipsTargetMachine.h"
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#include "llvm/Constants.h"
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#include "llvm/DerivedTypes.h"
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#include "llvm/Function.h"
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#include "llvm/PassManager.h"
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#include "MCTargetDesc/MipsBaseInfo.h"
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#include "llvm/ADT/Statistic.h"
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#include "llvm/CodeGen/JITCodeEmitter.h"
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#include "llvm/CodeGen/MachineConstantPool.h"
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#include "llvm/CodeGen/MachineFunctionPass.h"
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#include "llvm/CodeGen/MachineInstr.h"
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#include "llvm/CodeGen/MachineJumpTableInfo.h"
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#include "llvm/CodeGen/MachineModuleInfo.h"
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#include "llvm/CodeGen/MachineOperand.h"
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#include "llvm/CodeGen/Passes.h"
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#include "llvm/ADT/Statistic.h"
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#include "llvm/Constants.h"
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#include "llvm/DerivedTypes.h"
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#include "llvm/Function.h"
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#include "llvm/PassManager.h"
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#include "llvm/Support/Debug.h"
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#include "llvm/Support/ErrorHandling.h"
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#include "llvm/Support/raw_ostream.h"
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@ -37,8 +39,6 @@
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#include <iomanip>
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#endif
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#include "llvm/CodeGen/MachineOperand.h"
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using namespace llvm;
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STATISTIC(NumEmitted, "Number of machine instructions emitted");
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@ -66,9 +66,9 @@ class MipsCodeEmitter : public MachineFunctionPass {
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public:
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MipsCodeEmitter(TargetMachine &tm, JITCodeEmitter &mce) :
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MachineFunctionPass(ID), JTI(0),
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II((const MipsInstrInfo *) tm.getInstrInfo()),
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TD(tm.getTargetData()), TM(tm), MCE(mce), MCPEs(0), MJTEs(0),
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IsPIC(TM.getRelocationModel() == Reloc::PIC_) {
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II((const MipsInstrInfo *) tm.getInstrInfo()),
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TD(tm.getTargetData()), TM(tm), MCE(mce), MCPEs(0), MJTEs(0),
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IsPIC(TM.getRelocationModel() == Reloc::PIC_) {
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}
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bool runOnMachineFunction(MachineFunction &MF);
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@ -91,7 +91,7 @@ class MipsCodeEmitter : public MachineFunctionPass {
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/// Routines that handle operands which add machine relocations which are
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/// fixed up by the relocation stage.
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void emitGlobalAddress(const GlobalValue *GV, unsigned Reloc,
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bool MayNeedFarStub) const;
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bool MayNeedFarStub) const;
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void emitExternalSymbolAddress(const char *ES, unsigned Reloc) const;
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void emitConstPoolAddress(unsigned CPI, unsigned Reloc) const;
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void emitJumpTableAddress(unsigned JTIndex, unsigned Reloc) const;
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@ -105,6 +105,9 @@ class MipsCodeEmitter : public MachineFunctionPass {
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unsigned getRelocation(const MachineInstr &MI,
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const MachineOperand &MO) const;
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unsigned getJumpTargetOpValue(const MachineInstr &MI, unsigned OpNo) const;
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unsigned getBranchTargetOpValue(const MachineInstr &MI, unsigned OpNo) const;
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unsigned getMemEncoding(const MachineInstr &MI, unsigned OpNo) const;
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unsigned getSizeExtEncoding(const MachineInstr &MI, unsigned OpNo) const;
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unsigned getSizeInsEncoding(const MachineInstr &MI, unsigned OpNo) const;
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@ -165,23 +168,34 @@ unsigned MipsCodeEmitter::getRelocation(const MachineInstr &MI,
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return Mips::reloc_mips_lo;
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}
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unsigned MipsCodeEmitter::getJumpTargetOpValue(const MachineInstr &MI,
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unsigned OpNo) const {
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// FIXME: implement
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return 0;
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}
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unsigned MipsCodeEmitter::getBranchTargetOpValue(const MachineInstr &MI,
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unsigned OpNo) const {
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// FIXME: implement
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return 0;
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}
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unsigned MipsCodeEmitter::getMemEncoding(const MachineInstr &MI,
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unsigned OpNo) const {
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unsigned OpNo) const {
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// Base register is encoded in bits 20-16, offset is encoded in bits 15-0.
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assert(MI.getOperand(OpNo).isReg());
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unsigned RegBits = getMachineOpValue(MI, MI.getOperand(OpNo)) << 16;
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return
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(getMachineOpValue(MI, MI.getOperand(OpNo+1)) & 0xFFFF) | RegBits;
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return (getMachineOpValue(MI, MI.getOperand(OpNo+1)) & 0xFFFF) | RegBits;
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}
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unsigned MipsCodeEmitter::getSizeExtEncoding(const MachineInstr &MI,
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unsigned OpNo) const {
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unsigned OpNo) const {
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// size is encoded as size-1.
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return getMachineOpValue(MI, MI.getOperand(OpNo)) - 1;
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}
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unsigned MipsCodeEmitter::getSizeInsEncoding(const MachineInstr &MI,
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unsigned OpNo) const {
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unsigned OpNo) const {
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// size is encoded as pos+size-1.
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return getMachineOpValue(MI, MI.getOperand(OpNo-1)) +
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getMachineOpValue(MI, MI.getOperand(OpNo)) - 1;
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@ -190,7 +204,7 @@ unsigned MipsCodeEmitter::getSizeInsEncoding(const MachineInstr &MI,
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/// getMachineOpValue - Return binary encoding of operand. If the machine
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/// operand requires relocation, record the relocation and return zero.
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unsigned MipsCodeEmitter::getMachineOpValue(const MachineInstr &MI,
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const MachineOperand &MO) const {
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const MachineOperand &MO) const {
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if (MO.isReg())
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return MipsRegisterInfo::getRegisterNumbering(MO.getReg());
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else if (MO.isImm())
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@ -217,9 +231,10 @@ unsigned MipsCodeEmitter::getMachineOpValue(const MachineInstr &MI,
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}
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void MipsCodeEmitter::emitGlobalAddress(const GlobalValue *GV, unsigned Reloc,
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bool MayNeedFarStub) const {
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bool MayNeedFarStub) const {
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MCE.addRelocation(MachineRelocation::getGV(MCE.getCurrentPCOffset(), Reloc,
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const_cast<GlobalValue *>(GV), 0, MayNeedFarStub));
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const_cast<GlobalValue *>(GV), 0,
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MayNeedFarStub));
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}
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void MipsCodeEmitter::emitGlobalAddressUnaligned(const GlobalValue *GV,
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@ -248,7 +263,7 @@ emitJumpTableAddress(unsigned JTIndex, unsigned Reloc) const {
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}
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void MipsCodeEmitter::emitMachineBasicBlock(MachineBasicBlock *BB,
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unsigned Reloc) const {
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unsigned Reloc) const {
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MCE.addRelocation(MachineRelocation::getBB(MCE.getCurrentPCOffset(),
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Reloc, BB));
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}
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@ -395,7 +410,7 @@ void MipsCodeEmitter::emitWordLE(unsigned Word) {
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/// createMipsJITCodeEmitterPass - Return a pass that emits the collected Mips
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/// code to the specified MCE object.
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FunctionPass *llvm::createMipsJITCodeEmitterPass(MipsTargetMachine &TM,
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JITCodeEmitter &JCE) {
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JITCodeEmitter &JCE) {
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return new MipsCodeEmitter(TM, JCE);
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}
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