From 48b828fdb467655fa630fed41e49e2a481fb6dab Mon Sep 17 00:00:00 2001 From: Jim Grosbach Date: Fri, 3 Oct 2008 15:53:56 +0000 Subject: [PATCH] Indexing off by one resulted in errant encoding of source register for reg->reg moves. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@57011 91177308-0d34-0410-b5e6-96231b3b80d8 --- lib/Target/ARM/ARMCodeEmitter.cpp | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/lib/Target/ARM/ARMCodeEmitter.cpp b/lib/Target/ARM/ARMCodeEmitter.cpp index 3936afc7171..a8fe2ea4f19 100644 --- a/lib/Target/ARM/ARMCodeEmitter.cpp +++ b/lib/Target/ARM/ARMCodeEmitter.cpp @@ -416,7 +416,7 @@ unsigned ARMCodeEmitter::getAddrMode1InstrBinary(const MachineInstr &MI, const MachineOperand &MO = MI.getOperand(OpIdx); if (MO.isReg()) // Encode register Rm. - return Binary | getMachineOpValue(MI, NumDefs + 1); + return Binary | getMachineOpValue(MI, NumDefs); // Encode so_imm. // Set bit I(25) to identify this is the immediate form of