[NVPTX] Handle floating-point conversion patterns that are not explicitly ordered or unordered

Fixes PR22322

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@227117 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Justin Holewinski 2015-01-26 19:11:20 +00:00
parent 8da9a6686a
commit 48e872230d
2 changed files with 75 additions and 6 deletions

View File

@ -1659,12 +1659,12 @@ multiclass FSET_FORMAT<PatFrag OpNode, PatLeaf Mode, PatLeaf ModeFTZ> {
(SET_f64ir fpimm:$a, Float64Regs:$b, Mode)>;
}
defm FSetGT : FSET_FORMAT<setogt, CmpGT, CmpGT_FTZ>;
defm FSetLT : FSET_FORMAT<setolt, CmpLT, CmpLT_FTZ>;
defm FSetGE : FSET_FORMAT<setoge, CmpGE, CmpGE_FTZ>;
defm FSetLE : FSET_FORMAT<setole, CmpLE, CmpLE_FTZ>;
defm FSetEQ : FSET_FORMAT<setoeq, CmpEQ, CmpEQ_FTZ>;
defm FSetNE : FSET_FORMAT<setone, CmpNE, CmpNE_FTZ>;
defm FSetOGT : FSET_FORMAT<setogt, CmpGT, CmpGT_FTZ>;
defm FSetOLT : FSET_FORMAT<setolt, CmpLT, CmpLT_FTZ>;
defm FSetOGE : FSET_FORMAT<setoge, CmpGE, CmpGE_FTZ>;
defm FSetOLE : FSET_FORMAT<setole, CmpLE, CmpLE_FTZ>;
defm FSetOEQ : FSET_FORMAT<setoeq, CmpEQ, CmpEQ_FTZ>;
defm FSetONE : FSET_FORMAT<setone, CmpNE, CmpNE_FTZ>;
defm FSetUGT : FSET_FORMAT<setugt, CmpGTU, CmpGTU_FTZ>;
defm FSetULT : FSET_FORMAT<setult, CmpLTU, CmpLTU_FTZ>;
@ -1673,6 +1673,13 @@ defm FSetULE : FSET_FORMAT<setule, CmpLEU, CmpLEU_FTZ>;
defm FSetUEQ : FSET_FORMAT<setueq, CmpEQU, CmpEQU_FTZ>;
defm FSetUNE : FSET_FORMAT<setune, CmpNEU, CmpNEU_FTZ>;
defm FSetGT : FSET_FORMAT<setgt, CmpGT, CmpGT_FTZ>;
defm FSetLT : FSET_FORMAT<setlt, CmpLT, CmpLT_FTZ>;
defm FSetGE : FSET_FORMAT<setge, CmpGE, CmpGE_FTZ>;
defm FSetLE : FSET_FORMAT<setle, CmpLE, CmpLE_FTZ>;
defm FSetEQ : FSET_FORMAT<seteq, CmpEQ, CmpEQ_FTZ>;
defm FSetNE : FSET_FORMAT<setne, CmpNE, CmpNE_FTZ>;
defm FSetNUM : FSET_FORMAT<seto, CmpNUM, CmpNUM_FTZ>;
defm FSetNAN : FSET_FORMAT<setuo, CmpNAN, CmpNAN_FTZ>;

View File

@ -0,0 +1,62 @@
; RUN: llc < %s -march=nvptx -mcpu=sm_20 | FileCheck %s
target datalayout = "e-i64:64-v16:16-v32:32-n16:32:64"
target triple = "nvptx64-nvidia-cuda"
%class.float3 = type { float, float, float }
; Function Attrs: nounwind
; CHECK-LABEL: some_kernel
define void @some_kernel(%class.float3* nocapture %dst) #0 {
_ZL11compute_vecRK6float3jb.exit:
%ret_vec.sroa.8.i = alloca float, align 4
%0 = tail call i32 @llvm.ptx.read.ctaid.x()
%1 = tail call i32 @llvm.ptx.read.ntid.x()
%2 = mul nsw i32 %1, %0
%3 = tail call i32 @llvm.ptx.read.tid.x()
%4 = add nsw i32 %2, %3
%5 = zext i32 %4 to i64
%6 = bitcast float* %ret_vec.sroa.8.i to i8*
call void @llvm.lifetime.start(i64 4, i8* %6)
%7 = and i32 %4, 15
%8 = icmp eq i32 %7, 0
%9 = select i1 %8, float 0.000000e+00, float -1.000000e+00
store float %9, float* %ret_vec.sroa.8.i, align 4
; CHECK: setp.lt.f32 %p{{[0-9]+}}, %f{{[0-9]+}}, 0f00000000
%10 = fcmp olt float %9, 0.000000e+00
%ret_vec.sroa.8.i.val = load float* %ret_vec.sroa.8.i, align 4
%11 = select i1 %10, float 0.000000e+00, float %ret_vec.sroa.8.i.val
call void @llvm.lifetime.end(i64 4, i8* %6)
%12 = getelementptr inbounds %class.float3* %dst, i64 %5, i32 0
store float 0.000000e+00, float* %12, align 4
%13 = getelementptr inbounds %class.float3* %dst, i64 %5, i32 1
store float %11, float* %13, align 4
%14 = getelementptr inbounds %class.float3* %dst, i64 %5, i32 2
store float 0.000000e+00, float* %14, align 4
ret void
}
; Function Attrs: nounwind readnone
declare i32 @llvm.ptx.read.ctaid.x() #1
; Function Attrs: nounwind readnone
declare i32 @llvm.ptx.read.ntid.x() #1
; Function Attrs: nounwind readnone
declare i32 @llvm.ptx.read.tid.x() #1
; Function Attrs: nounwind
declare void @llvm.lifetime.start(i64, i8* nocapture) #2
; Function Attrs: nounwind
declare void @llvm.lifetime.end(i64, i8* nocapture) #2
attributes #0 = { nounwind "less-precise-fpmad"="false" "no-frame-pointer-elim"="true" "no-frame-pointer-elim-non-leaf" "no-infs-fp-math"="true" "no-nans-fp-math"="true" "stack-protector-buffer-size"="8" "unsafe-fp-math"="true" "use-soft-float"="false" }
attributes #1 = { nounwind readnone }
attributes #2 = { nounwind }
!nvvm.annotations = !{!0}
!llvm.ident = !{!1}
!0 = !{void (%class.float3*)* @some_kernel, !"kernel", i32 1}
!1 = !{!"clang version 3.5.1 (tags/RELEASE_351/final)"}