From 48fbc2d39b6efbd8d2d02e830cc91ab6e49b8dde Mon Sep 17 00:00:00 2001 From: Devang Patel Date: Wed, 17 Sep 2008 18:21:49 +0000 Subject: [PATCH] Do not hoist instruction above branch condition. The instruction may use branch condition. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@56286 91177308-0d34-0410-b5e6-96231b3b80d8 --- lib/Transforms/Utils/SimplifyCFG.cpp | 11 ++--------- .../SimplifyCFG/2008-09-17-SpeculativeHoist.ll | 18 ++++++++++++++++++ 2 files changed, 20 insertions(+), 9 deletions(-) create mode 100644 test/Transforms/SimplifyCFG/2008-09-17-SpeculativeHoist.ll diff --git a/lib/Transforms/Utils/SimplifyCFG.cpp b/lib/Transforms/Utils/SimplifyCFG.cpp index efd17650f2d..39163e40504 100644 --- a/lib/Transforms/Utils/SimplifyCFG.cpp +++ b/lib/Transforms/Utils/SimplifyCFG.cpp @@ -1046,15 +1046,8 @@ static bool SpeculativelyExecuteBB(BranchInst *BI, BasicBlock *BB1) { return false; } - // If we get here, we can hoist the instruction. Try to place it before the - // icmp instruction preceeding the conditional branch. - BasicBlock::iterator InsertPos = BI; - if (InsertPos != BIParent->begin()) - --InsertPos; - if (InsertPos == BrCond && !isa(BrCond)) - BIParent->getInstList().splice(InsertPos, BB1->getInstList(), I); - else - BIParent->getInstList().splice(BI, BB1->getInstList(), I); + // If we get here, we can hoist the instruction. + BIParent->getInstList().splice(BI, BB1->getInstList(), I); // Create a select whose true value is the speculatively executed value and // false value is the previously determined FalseV. diff --git a/test/Transforms/SimplifyCFG/2008-09-17-SpeculativeHoist.ll b/test/Transforms/SimplifyCFG/2008-09-17-SpeculativeHoist.ll new file mode 100644 index 00000000000..b2d671da67f --- /dev/null +++ b/test/Transforms/SimplifyCFG/2008-09-17-SpeculativeHoist.ll @@ -0,0 +1,18 @@ +; RUN: llvm-as < %s | opt -simplifycfg -disable-output +; PR 2800 + +define void @foo() { +start: + %tmp = call i1 @bar( ) ; [#uses=4] + br i1 %tmp, label %brtrue, label %brfalse + +brtrue: ; preds = %start + %tmpnew = and i1 %tmp, %tmp ; [#uses=1] + br label %brfalse + +brfalse: ; preds = %brtrue, %start + %andandtmp.0 = phi i1 [ %tmp, %start ], [ %tmpnew, %brtrue ] ; [#uses=0] + ret void +} + +declare i1 @bar()