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Thumb assembly parsing and encoding for LDRB.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138059 91177308-0d34-0410-b5e6-96231b3b80d8
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@ -179,11 +179,13 @@ def t_addrmode_is2 : Operand<i32>,
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// t_addrmode_is1 := reg + imm5
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//
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def t_addrmode_is1_asm_operand : AsmOperandClass { let Name = "MemThumbRIs1"; }
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def t_addrmode_is1 : Operand<i32>,
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ComplexPattern<i32, 2, "SelectThumbAddrModeImm5S1", []> {
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let EncoderMethod = "getAddrModeISOpValue";
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let DecoderMethod = "DecodeThumbAddrModeIS";
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let PrintMethod = "printThumbAddrModeImm5S1Operand";
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let ParserMatchClass = t_addrmode_is1_asm_operand;
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let MIOperandInfo = (ops tGPR:$base, i32imm:$offsimm);
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}
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@ -628,6 +628,15 @@ public:
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int64_t Val = Mem.OffsetImm->getValue();
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return Val >= 0 && Val <= 124 && (Val % 4) == 0;
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}
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bool isMemThumbRIs1() const {
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if (Kind != Memory || Mem.OffsetRegNum != 0 ||
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!isARMLowRegister(Mem.BaseRegNum))
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return false;
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// Immediate offset in range [0, 31].
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if (!Mem.OffsetImm) return true;
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int64_t Val = Mem.OffsetImm->getValue();
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return Val >= 0 && Val <= 31;
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}
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bool isMemThumbSPI() const {
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if (Kind != Memory || Mem.OffsetRegNum != 0 || Mem.BaseRegNum != ARM::SP)
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return false;
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@ -1000,6 +1009,13 @@ public:
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Inst.addOperand(MCOperand::CreateImm(Val));
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}
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void addMemThumbRIs1Operands(MCInst &Inst, unsigned N) const {
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assert(N == 2 && "Invalid number of operands!");
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int64_t Val = Mem.OffsetImm ? (Mem.OffsetImm->getValue()) : 0;
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Inst.addOperand(MCOperand::CreateReg(Mem.BaseRegNum));
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Inst.addOperand(MCOperand::CreateImm(Val));
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}
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void addMemThumbSPIOperands(MCInst &Inst, unsigned N) const {
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assert(N == 2 && "Invalid number of operands!");
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int64_t Val = Mem.OffsetImm ? (Mem.OffsetImm->getValue() / 4) : 0;
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@ -210,3 +210,23 @@ _func:
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ldr r1, [r2, r3]
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@ CHECK: ldr r1, [r2, r3] @ encoding: [0xd1,0x58]
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@------------------------------------------------------------------------------
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@ LDRB (immediate)
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@------------------------------------------------------------------------------
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ldrb r4, [r3]
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ldrb r5, [r6, #0]
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ldrb r6, [r7, #31]
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@ CHECK: ldrb r4, [r3] @ encoding: [0x1c,0x78]
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@ CHECK: ldrb r5, [r6] @ encoding: [0x35,0x78]
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@ CHECK: ldrb r6, [r7, #31] @ encoding: [0xfe,0x7f]
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@------------------------------------------------------------------------------
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@ LDRB (register)
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@------------------------------------------------------------------------------
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ldrb r6, [r4, r5]
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@ CHECK: ldrb r6, [r4, r5] @ encoding: [0x66,0x5d]
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