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https://github.com/c64scene-ar/llvm-6502.git
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Clean up.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@32027 91177308-0d34-0410-b5e6-96231b3b80d8
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@ -643,10 +643,12 @@ bool X86DAGToDAGISel::MatchAddress(SDOperand N, X86ISelAddressMode &AM,
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// For X86-64 PIC code, only allow GV / CP + displacement so we can use RIP
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// For X86-64 PIC code, only allow GV / CP + displacement so we can use RIP
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// relative addressing mode.
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// relative addressing mode.
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if ((!Subtarget->is64Bit() || TM.getCodeModel() == CodeModel::Small) &&
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if (Subtarget->is64Bit() && TM.getCodeModel() != CodeModel::Small)
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(!Available || (AM.Base.Reg.Val && AM.IndexReg.Val))) {
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break;
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if (!Available || (AM.Base.Reg.Val && AM.IndexReg.Val)) {
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bool isRIP = Subtarget->is64Bit();
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bool isRIP = Subtarget->is64Bit();
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if (isRIP && (AM.Base.Reg.Val || AM.Scale > 1 || AM.IndexReg.Val ||
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if (isRIP &&
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(AM.Base.Reg.Val || AM.Scale > 1 || AM.IndexReg.Val ||
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AM.BaseType == X86ISelAddressMode::FrameIndexBase))
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AM.BaseType == X86ISelAddressMode::FrameIndexBase))
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break;
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break;
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if (ConstantPoolSDNode *CP =
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if (ConstantPoolSDNode *CP =
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@ -655,8 +657,7 @@ bool X86DAGToDAGISel::MatchAddress(SDOperand N, X86ISelAddressMode &AM,
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AM.CP = CP->getConstVal();
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AM.CP = CP->getConstVal();
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AM.Align = CP->getAlignment();
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AM.Align = CP->getAlignment();
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AM.Disp += CP->getOffset();
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AM.Disp += CP->getOffset();
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if (isRIP)
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AM.isRIPRel = isRIP;
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AM.isRIPRel = true;
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return false;
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return false;
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}
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}
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} else if (GlobalAddressSDNode *G =
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} else if (GlobalAddressSDNode *G =
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@ -664,8 +665,7 @@ bool X86DAGToDAGISel::MatchAddress(SDOperand N, X86ISelAddressMode &AM,
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if (AM.GV == 0) {
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if (AM.GV == 0) {
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AM.GV = G->getGlobal();
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AM.GV = G->getGlobal();
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AM.Disp += G->getOffset();
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AM.Disp += G->getOffset();
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if (isRIP)
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AM.isRIPRel = isRIP;
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AM.isRIPRel = true;
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return false;
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return false;
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}
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}
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} else if (isRoot && isRIP) {
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} else if (isRoot && isRIP) {
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