diff --git a/lib/CodeGen/CodePlacementOpt.cpp b/lib/CodeGen/CodePlacementOpt.cpp
index a13a310dec9..3ff2a046d23 100644
--- a/lib/CodeGen/CodePlacementOpt.cpp
+++ b/lib/CodeGen/CodePlacementOpt.cpp
@@ -102,13 +102,6 @@ bool CodePlacementOpt::HasAnalyzableTerminator(MachineBasicBlock *MBB) {
   // Conservatively ignore EH landing pads.
   if (MBB->isLandingPad()) return false;
 
-  // Ignore blocks which look like they might have EH-related control flow.
-  // At the time of this writing, there are blocks which AnalyzeBranch
-  // thinks end in single uncoditional branches, yet which have two CFG
-  // successors. Code in this file is not prepared to reason about such things.
-  if (!MBB->empty() && MBB->back().isEHLabel())
-    return false;
-
   // Aggressively handle return blocks and similar constructs.
   if (MBB->succ_empty()) return true;
 
@@ -118,6 +111,14 @@ bool CodePlacementOpt::HasAnalyzableTerminator(MachineBasicBlock *MBB) {
   // Make sure the terminator is understood.
   if (TII->AnalyzeBranch(*MBB, TBB, FBB, Cond))
     return false;
+   // Ignore blocks which look like they might have EH-related control flow.
+   // AnalyzeBranch thinks it knows how to analyze such things, but it doesn't
+   // recognize the possibility of a control transfer through an unwind.
+   // Such blocks contain EH_LABEL instructions, however they may be in the
+   // middle of the block. Instead of searching for them, just check to see
+   // if the CFG disagrees with AnalyzeBranch.
+  if (1u + !Cond.empty() != MBB->succ_size())
+    return false;
   // Make sure we have the option of reversing the condition.
   if (!Cond.empty() && TII->ReverseBranchCondition(Cond))
     return false;
diff --git a/test/CodeGen/X86/code_placement_eh.ll b/test/CodeGen/X86/code_placement_eh.ll
new file mode 100644
index 00000000000..172d5910d03
--- /dev/null
+++ b/test/CodeGen/X86/code_placement_eh.ll
@@ -0,0 +1,45 @@
+; RUN: llc < %s
+
+; CodePlacementOpt shouldn't try to modify this loop because
+; it involves EH edges.
+
+target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f80:128:128-n8:16:32"
+target triple = "i386-apple-darwin10.0"
+
+define void @foo() {
+invcont5:
+  br label %bb15
+
+.noexc3:                                          ; preds = %bb15
+  br i1 undef, label %bb18.i5.i, label %bb15
+
+.noexc6.i.i:                                      ; preds = %bb18.i5.i
+  %tmp2021 = invoke float @cosf(float 0.000000e+00) readonly
+          to label %bb18.i5.i unwind label %lpad.i.i ; <float> [#uses=0]
+
+bb18.i5.i:                                        ; preds = %.noexc6.i.i, %bb51.i
+  %tmp2019 = invoke float @sinf(float 0.000000e+00) readonly
+          to label %.noexc6.i.i unwind label %lpad.i.i ; <float> [#uses=0]
+
+lpad.i.i:                                         ; preds = %bb18.i5.i, %.noexc6.i.i
+  %eh_ptr.i.i = call i8* @llvm.eh.exception()     ; <i8*> [#uses=1]
+  unreachable
+
+lpad59.i:                                         ; preds = %bb15
+  %eh_ptr60.i = call i8* @llvm.eh.exception()     ; <i8*> [#uses=1]
+  unreachable
+
+bb15:                                             ; preds = %.noexc3, %invcont5
+  invoke fastcc void @_ZN28btHashedOverlappingPairCacheC2Ev()
+          to label %.noexc3 unwind label %lpad59.i
+}
+
+declare i8* @llvm.eh.exception() nounwind readonly
+
+declare i32 @llvm.eh.selector(i8*, i8*, ...) nounwind
+
+declare float @sinf(float) readonly
+
+declare float @cosf(float) readonly
+
+declare fastcc void @_ZN28btHashedOverlappingPairCacheC2Ev() align 2