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Mark MOVZX32_NOREX as isCodeGenOnly and neverHasSideEffects. The isCodeGenOnly change allows special detection of _NOREX instructions to be removed from tablegen disassembler code.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@160951 91177308-0d34-0410-b5e6-96231b3b80d8
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@ -82,6 +82,7 @@ def MOVZX32rm16: I<0xB7, MRMSrcMem, (outs GR32:$dst), (ins i16mem:$src),
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// These are the same as the regular MOVZX32rr8 and MOVZX32rm8
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// These are the same as the regular MOVZX32rr8 and MOVZX32rm8
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// except that they use GR32_NOREX for the output operand register class
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// except that they use GR32_NOREX for the output operand register class
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// instead of GR32. This allows them to operate on h registers on x86-64.
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// instead of GR32. This allows them to operate on h registers on x86-64.
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let neverHasSideEffects = 1, isCodeGenOnly = 1 in {
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def MOVZX32_NOREXrr8 : I<0xB6, MRMSrcReg,
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def MOVZX32_NOREXrr8 : I<0xB6, MRMSrcReg,
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(outs GR32_NOREX:$dst), (ins GR8_NOREX:$src),
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(outs GR32_NOREX:$dst), (ins GR8_NOREX:$src),
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"movz{bl|x}\t{$src, $dst|$dst, $src}",
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"movz{bl|x}\t{$src, $dst|$dst, $src}",
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@ -91,6 +92,7 @@ def MOVZX32_NOREXrm8 : I<0xB6, MRMSrcMem,
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(outs GR32_NOREX:$dst), (ins i8mem_NOREX:$src),
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(outs GR32_NOREX:$dst), (ins i8mem_NOREX:$src),
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"movz{bl|x}\t{$src, $dst|$dst, $src}",
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"movz{bl|x}\t{$src, $dst|$dst, $src}",
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[], IIC_MOVZX>, TB;
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[], IIC_MOVZX>, TB;
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}
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// MOVSX64rr8 always has a REX prefix and it has an 8-bit register
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// MOVSX64rr8 always has a REX prefix and it has an 8-bit register
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// operand, which makes it a rare instruction with an 8-bit register
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// operand, which makes it a rare instruction with an 8-bit register
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@ -405,8 +405,7 @@ RecognizableInstr::filter_ret RecognizableInstr::filter() const {
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// printed as a separate "instruction".
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// printed as a separate "instruction".
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if (Name.find("_Int") != Name.npos ||
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if (Name.find("_Int") != Name.npos ||
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Name.find("Int_") != Name.npos ||
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Name.find("Int_") != Name.npos)
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Name.find("_NOREX") != Name.npos)
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return FILTER_STRONG;
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return FILTER_STRONG;
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// Filter out instructions with segment override prefixes.
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// Filter out instructions with segment override prefixes.
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