ARM SSAT instruction 5-bit immediate handling.

The immediate is in the range 1-32, but is encoded as 0-31 in a 5-bit bitfield.
Update the representation such that we store the operand as 0-31, allowing us
to remove the encoder method and the special case handling in the disassembler.
Update the assembly parser and the instruction printer accordingly.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135823 91177308-0d34-0410-b5e6-96231b3b80d8

utils/TableGen/EDEmitter.cpp

@@ -587,6 +587,7 @@ static int ARMFlagFromOpName(LiteralConstantEmitter *type,
   IMM("neg_zero");
   IMM("imm0_31");
   IMM("imm0_31_m1");
+  IMM("imm1_32");
   IMM("nModImm");
   IMM("imm0_7");
   IMM("imm0_15");
@@ -603,7 +604,6 @@ static int ARMFlagFromOpName(LiteralConstantEmitter *type,
   IMM("t_adrlabel");
   IMM("t2adrlabel");
   IMM("shift_imm");
-  IMM("ssat_imm");
   IMM("neon_vcvt_imm32");
   IMM("shr_imm8");
   IMM("shr_imm16");