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MachineVerifier: Report register for bad liveranges
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@222380 91177308-0d34-0410-b5e6-96231b3b80d8
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@ -215,9 +215,9 @@ namespace {
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void report(const char *msg, const MachineBasicBlock *MBB,
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void report(const char *msg, const MachineBasicBlock *MBB,
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const LiveInterval &LI);
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const LiveInterval &LI);
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void report(const char *msg, const MachineFunction *MF,
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void report(const char *msg, const MachineFunction *MF,
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const LiveRange &LR);
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const LiveRange &LR, unsigned Reg);
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void report(const char *msg, const MachineBasicBlock *MBB,
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void report(const char *msg, const MachineBasicBlock *MBB,
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const LiveRange &LR);
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const LiveRange &LR, unsigned Reg);
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void verifyInlineAsm(const MachineInstr *MI);
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void verifyInlineAsm(const MachineInstr *MI);
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@ -432,15 +432,17 @@ void MachineVerifier::report(const char *msg, const MachineBasicBlock *MBB,
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}
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}
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void MachineVerifier::report(const char *msg, const MachineBasicBlock *MBB,
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void MachineVerifier::report(const char *msg, const MachineBasicBlock *MBB,
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const LiveRange &LR) {
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const LiveRange &LR, unsigned Reg) {
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report(msg, MBB);
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report(msg, MBB);
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*OS << "- liverange: " << LR << "\n";
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*OS << "- liverange: " << LR << '\n';
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*OS << "- register: " << PrintReg(Reg, TRI) << '\n';
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}
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}
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void MachineVerifier::report(const char *msg, const MachineFunction *MF,
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void MachineVerifier::report(const char *msg, const MachineFunction *MF,
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const LiveRange &LR) {
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const LiveRange &LR, unsigned Reg) {
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report(msg, MF);
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report(msg, MF);
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*OS << "- liverange: " << LR << "\n";
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*OS << "- liverange: " << LR << '\n';
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*OS << "- register: " << PrintReg(Reg, TRI) << '\n';
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}
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}
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void MachineVerifier::markReachable(const MachineBasicBlock *MBB) {
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void MachineVerifier::markReachable(const MachineBasicBlock *MBB) {
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@ -1360,13 +1362,13 @@ void MachineVerifier::verifyLiveRangeValue(const LiveRange &LR,
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const VNInfo *DefVNI = LR.getVNInfoAt(VNI->def);
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const VNInfo *DefVNI = LR.getVNInfoAt(VNI->def);
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if (!DefVNI) {
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if (!DefVNI) {
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report("Valno not live at def and not marked unused", MF, LR);
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report("Valno not live at def and not marked unused", MF, LR, Reg);
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*OS << "Valno #" << VNI->id << '\n';
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*OS << "Valno #" << VNI->id << '\n';
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return;
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return;
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}
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}
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if (DefVNI != VNI) {
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if (DefVNI != VNI) {
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report("Live segment at def has different valno", MF, LR);
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report("Live segment at def has different valno", MF, LR, Reg);
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*OS << "Valno #" << VNI->id << " is defined at " << VNI->def
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*OS << "Valno #" << VNI->id << " is defined at " << VNI->def
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<< " where valno #" << DefVNI->id << " is live\n";
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<< " where valno #" << DefVNI->id << " is live\n";
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return;
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return;
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@ -1374,7 +1376,7 @@ void MachineVerifier::verifyLiveRangeValue(const LiveRange &LR,
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const MachineBasicBlock *MBB = LiveInts->getMBBFromIndex(VNI->def);
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const MachineBasicBlock *MBB = LiveInts->getMBBFromIndex(VNI->def);
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if (!MBB) {
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if (!MBB) {
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report("Invalid definition index", MF, LR);
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report("Invalid definition index", MF, LR, Reg);
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*OS << "Valno #" << VNI->id << " is defined at " << VNI->def
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*OS << "Valno #" << VNI->id << " is defined at " << VNI->def
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<< " in " << LR << '\n';
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<< " in " << LR << '\n';
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return;
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return;
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@ -1382,7 +1384,7 @@ void MachineVerifier::verifyLiveRangeValue(const LiveRange &LR,
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if (VNI->isPHIDef()) {
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if (VNI->isPHIDef()) {
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if (VNI->def != LiveInts->getMBBStartIdx(MBB)) {
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if (VNI->def != LiveInts->getMBBStartIdx(MBB)) {
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report("PHIDef value is not defined at MBB start", MBB, LR);
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report("PHIDef value is not defined at MBB start", MBB, LR, Reg);
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*OS << "Valno #" << VNI->id << " is defined at " << VNI->def
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*OS << "Valno #" << VNI->id << " is defined at " << VNI->def
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<< ", not at the beginning of BB#" << MBB->getNumber() << '\n';
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<< ", not at the beginning of BB#" << MBB->getNumber() << '\n';
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}
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}
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@ -1392,7 +1394,7 @@ void MachineVerifier::verifyLiveRangeValue(const LiveRange &LR,
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// Non-PHI def.
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// Non-PHI def.
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const MachineInstr *MI = LiveInts->getInstructionFromIndex(VNI->def);
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const MachineInstr *MI = LiveInts->getInstructionFromIndex(VNI->def);
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if (!MI) {
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if (!MI) {
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report("No instruction at def index", MBB, LR);
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report("No instruction at def index", MBB, LR, Reg);
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*OS << "Valno #" << VNI->id << " is defined at " << VNI->def << '\n';
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*OS << "Valno #" << VNI->id << " is defined at " << VNI->def << '\n';
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return;
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return;
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}
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}
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@ -1425,12 +1427,13 @@ void MachineVerifier::verifyLiveRangeValue(const LiveRange &LR,
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// DEF slots.
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// DEF slots.
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if (isEarlyClobber) {
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if (isEarlyClobber) {
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if (!VNI->def.isEarlyClobber()) {
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if (!VNI->def.isEarlyClobber()) {
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report("Early clobber def must be at an early-clobber slot", MBB, LR);
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report("Early clobber def must be at an early-clobber slot", MBB, LR,
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Reg);
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*OS << "Valno #" << VNI->id << " is defined at " << VNI->def << '\n';
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*OS << "Valno #" << VNI->id << " is defined at " << VNI->def << '\n';
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}
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}
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} else if (!VNI->def.isRegister()) {
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} else if (!VNI->def.isRegister()) {
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report("Non-PHI, non-early clobber def must be at a register slot",
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report("Non-PHI, non-early clobber def must be at a register slot",
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MBB, LR);
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MBB, LR, Reg);
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*OS << "Valno #" << VNI->id << " is defined at " << VNI->def << '\n';
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*OS << "Valno #" << VNI->id << " is defined at " << VNI->def << '\n';
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}
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}
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}
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}
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@ -1444,31 +1447,31 @@ void MachineVerifier::verifyLiveRangeSegment(const LiveRange &LR,
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assert(VNI && "Live segment has no valno");
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assert(VNI && "Live segment has no valno");
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if (VNI->id >= LR.getNumValNums() || VNI != LR.getValNumInfo(VNI->id)) {
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if (VNI->id >= LR.getNumValNums() || VNI != LR.getValNumInfo(VNI->id)) {
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report("Foreign valno in live segment", MF, LR);
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report("Foreign valno in live segment", MF, LR, Reg);
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*OS << S << " has a bad valno\n";
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*OS << S << " has a bad valno\n";
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}
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}
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if (VNI->isUnused()) {
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if (VNI->isUnused()) {
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report("Live segment valno is marked unused", MF, LR);
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report("Live segment valno is marked unused", MF, LR, Reg);
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*OS << S << '\n';
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*OS << S << '\n';
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}
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}
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const MachineBasicBlock *MBB = LiveInts->getMBBFromIndex(S.start);
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const MachineBasicBlock *MBB = LiveInts->getMBBFromIndex(S.start);
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if (!MBB) {
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if (!MBB) {
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report("Bad start of live segment, no basic block", MF, LR);
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report("Bad start of live segment, no basic block", MF, LR, Reg);
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*OS << S << '\n';
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*OS << S << '\n';
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return;
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return;
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}
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}
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SlotIndex MBBStartIdx = LiveInts->getMBBStartIdx(MBB);
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SlotIndex MBBStartIdx = LiveInts->getMBBStartIdx(MBB);
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if (S.start != MBBStartIdx && S.start != VNI->def) {
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if (S.start != MBBStartIdx && S.start != VNI->def) {
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report("Live segment must begin at MBB entry or valno def", MBB, LR);
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report("Live segment must begin at MBB entry or valno def", MBB, LR, Reg);
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*OS << S << '\n';
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*OS << S << '\n';
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}
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}
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const MachineBasicBlock *EndMBB =
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const MachineBasicBlock *EndMBB =
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LiveInts->getMBBFromIndex(S.end.getPrevSlot());
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LiveInts->getMBBFromIndex(S.end.getPrevSlot());
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if (!EndMBB) {
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if (!EndMBB) {
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report("Bad end of live segment, no basic block", MF, LR);
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report("Bad end of live segment, no basic block", MF, LR, Reg);
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*OS << S << '\n';
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*OS << S << '\n';
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return;
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return;
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}
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}
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@ -1486,14 +1489,14 @@ void MachineVerifier::verifyLiveRangeSegment(const LiveRange &LR,
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const MachineInstr *MI =
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const MachineInstr *MI =
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LiveInts->getInstructionFromIndex(S.end.getPrevSlot());
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LiveInts->getInstructionFromIndex(S.end.getPrevSlot());
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if (!MI) {
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if (!MI) {
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report("Live segment doesn't end at a valid instruction", EndMBB, LR);
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report("Live segment doesn't end at a valid instruction", EndMBB, LR, Reg);
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*OS << S << '\n';
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*OS << S << '\n';
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return;
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return;
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}
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}
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// The block slot must refer to a basic block boundary.
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// The block slot must refer to a basic block boundary.
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if (S.end.isBlock()) {
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if (S.end.isBlock()) {
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report("Live segment ends at B slot of an instruction", EndMBB, LR);
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report("Live segment ends at B slot of an instruction", EndMBB, LR, Reg);
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*OS << S << '\n';
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*OS << S << '\n';
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}
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}
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@ -1501,7 +1504,8 @@ void MachineVerifier::verifyLiveRangeSegment(const LiveRange &LR,
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// Segment ends on the dead slot.
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// Segment ends on the dead slot.
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// That means there must be a dead def.
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// That means there must be a dead def.
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if (!SlotIndex::isSameInstr(S.start, S.end)) {
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if (!SlotIndex::isSameInstr(S.start, S.end)) {
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report("Live segment ending at dead slot spans instructions", EndMBB, LR);
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report("Live segment ending at dead slot spans instructions", EndMBB, LR,
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Reg);
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*OS << S << '\n';
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*OS << S << '\n';
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}
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}
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}
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}
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@ -1511,7 +1515,7 @@ void MachineVerifier::verifyLiveRangeSegment(const LiveRange &LR,
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if (S.end.isEarlyClobber()) {
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if (S.end.isEarlyClobber()) {
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if (I+1 == LR.end() || (I+1)->start != S.end) {
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if (I+1 == LR.end() || (I+1)->start != S.end) {
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report("Live segment ending at early clobber slot must be "
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report("Live segment ending at early clobber slot must be "
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"redefined by an EC def in the same instruction", EndMBB, LR);
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"redefined by an EC def in the same instruction", EndMBB, LR, Reg);
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*OS << S << '\n';
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*OS << S << '\n';
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}
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}
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}
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}
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@ -1569,7 +1573,7 @@ void MachineVerifier::verifyLiveRangeSegment(const LiveRange &LR,
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// All predecessors must have a live-out value.
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// All predecessors must have a live-out value.
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if (!PVNI) {
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if (!PVNI) {
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report("Register not marked live out of predecessor", *PI, LR);
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report("Register not marked live out of predecessor", *PI, LR, Reg);
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*OS << "Valno #" << VNI->id << " live into BB#" << MFI->getNumber()
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*OS << "Valno #" << VNI->id << " live into BB#" << MFI->getNumber()
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<< '@' << LiveInts->getMBBStartIdx(MFI) << ", not live before "
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<< '@' << LiveInts->getMBBStartIdx(MFI) << ", not live before "
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<< PEnd << '\n';
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<< PEnd << '\n';
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@ -1578,7 +1582,7 @@ void MachineVerifier::verifyLiveRangeSegment(const LiveRange &LR,
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// Only PHI-defs can take different predecessor values.
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// Only PHI-defs can take different predecessor values.
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if (!IsPHI && PVNI != VNI) {
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if (!IsPHI && PVNI != VNI) {
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report("Different value live out of predecessor", *PI, LR);
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report("Different value live out of predecessor", *PI, LR, Reg);
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*OS << "Valno #" << PVNI->id << " live out of BB#"
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*OS << "Valno #" << PVNI->id << " live out of BB#"
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<< (*PI)->getNumber() << '@' << PEnd
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<< (*PI)->getNumber() << '@' << PEnd
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<< "\nValno #" << VNI->id << " live into BB#" << MFI->getNumber()
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<< "\nValno #" << VNI->id << " live into BB#" << MFI->getNumber()
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