Remove the MachineMove class.

It was just a less powerful and more confusing version of
MCCFIInstruction. A side effect is that, since MCCFIInstruction uses
dwarf register numbers, calls to getDwarfRegNum are pushed out, which
should allow further simplifications.

I left the MachineModuleInfo::addFrameMove interface unchanged since
this patch was already fairly big.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@181680 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Rafael Espindola
2013-05-13 01:16:13 +00:00
parent aa4f36407f
commit 4a971705bc
38 changed files with 169 additions and 177 deletions

View File

@@ -636,14 +636,13 @@ void AsmPrinter::emitPrologLabel(const MachineInstr &MI) {
OutStreamer.EmitCompactUnwindEncoding(MMI->getCompactUnwindEncoding());
MachineModuleInfo &MMI = MF->getMMI();
const std::vector<MachineMove> &Moves = MMI.getFrameMoves();
std::vector<MCCFIInstruction> Instructions = MMI.getFrameInstructions();
bool FoundOne = false;
(void)FoundOne;
for (std::vector<MachineMove>::const_iterator I = Moves.begin(),
E = Moves.end();
I != E; ++I) {
for (std::vector<MCCFIInstruction>::iterator I = Instructions.begin(),
E = Instructions.end(); I != E; ++I) {
if (I->getLabel() == Label) {
EmitCFIFrameMove(*I);
emitCFIInstruction(*I);
FoundOne = true;
}
}

View File

@@ -169,28 +169,21 @@ void AsmPrinter::EmitSectionOffset(const MCSymbol *Label,
// Dwarf Lowering Routines
//===----------------------------------------------------------------------===//
/// EmitCFIFrameMove - Emit a frame instruction.
void AsmPrinter::EmitCFIFrameMove(const MachineMove &Move) const {
const TargetRegisterInfo *RI = TM.getRegisterInfo();
const MachineLocation &Dst = Move.getDestination();
const MachineLocation &Src = Move.getSource();
// If advancing cfa.
if (Dst.isReg() && Dst.getReg() == MachineLocation::VirtualFP) {
if (Src.getReg() == MachineLocation::VirtualFP) {
OutStreamer.EmitCFIDefCfaOffset(-Src.getOffset());
} else {
// Reg + Offset
OutStreamer.EmitCFIDefCfa(RI->getDwarfRegNum(Src.getReg(), true),
Src.getOffset());
}
} else if (Src.isReg() && Src.getReg() == MachineLocation::VirtualFP) {
assert(Dst.isReg() && "Machine move not supported yet.");
OutStreamer.EmitCFIDefCfaRegister(RI->getDwarfRegNum(Dst.getReg(), true));
} else {
assert(!Dst.isReg() && "Machine move not supported yet.");
OutStreamer.EmitCFIOffset(RI->getDwarfRegNum(Src.getReg(), true),
Dst.getOffset());
void AsmPrinter::emitCFIInstruction(const MCCFIInstruction &Inst) const {
switch (Inst.getOperation()) {
default:
llvm_unreachable("Unexpected instruction");
case MCCFIInstruction::OpDefCfaOffset:
OutStreamer.EmitCFIDefCfaOffset(Inst.getOffset());
break;
case MCCFIInstruction::OpDefCfa:
OutStreamer.EmitCFIDefCfa(Inst.getRegister(), Inst.getOffset());
break;
case MCCFIInstruction::OpDefCfaRegister:
OutStreamer.EmitCFIDefCfaRegister(Inst.getRegister());
break;
case MCCFIInstruction::OpOffset:
OutStreamer.EmitCFIOffset(Inst.getRegister(), Inst.getOffset());
break;
}
}

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@@ -23,7 +23,6 @@ namespace llvm {
template <typename T> class SmallVectorImpl;
struct LandingPadInfo;
class MachineModuleInfo;
class MachineMove;
class MachineInstr;
class MachineFunction;
class MCAsmInfo;

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@@ -62,14 +62,8 @@ static bool getVerboseAsm() {
llvm_unreachable("Invalid verbose asm state");
}
LLVMTargetMachine::LLVMTargetMachine(const Target &T, StringRef Triple,
StringRef CPU, StringRef FS,
TargetOptions Options,
Reloc::Model RM, CodeModel::Model CM,
CodeGenOpt::Level OL)
: TargetMachine(T, Triple, CPU, FS, Options) {
CodeGenInfo = T.createMCCodeGenInfo(Triple, RM, CM, OL);
AsmInfo = T.createMCAsmInfo(Triple);
void LLVMTargetMachine::initAsmInfo() {
AsmInfo = TheTarget.createMCAsmInfo(*getRegisterInfo(), TargetTriple);
// TargetSelect.h moved to a different directory between LLVM 2.9 and 3.0,
// and if the old one gets included then MCAsmInfo will be NULL and
// we'll crash later.
@@ -79,6 +73,15 @@ LLVMTargetMachine::LLVMTargetMachine(const Target &T, StringRef Triple,
"and that InitializeAllTargetMCs() is being invoked!");
}
LLVMTargetMachine::LLVMTargetMachine(const Target &T, StringRef Triple,
StringRef CPU, StringRef FS,
TargetOptions Options,
Reloc::Model RM, CodeModel::Model CM,
CodeGenOpt::Level OL)
: TargetMachine(T, Triple, CPU, FS, Options) {
CodeGenInfo = T.createMCCodeGenInfo(Triple, RM, CM, OL);
}
void LLVMTargetMachine::addAnalysisPasses(PassManagerBase &PM) {
PM.add(createBasicTargetTransformInfoPass(getTargetLowering()));
}

View File

@@ -268,6 +268,39 @@ MachineModuleInfo::MachineModuleInfo()
MachineModuleInfo::~MachineModuleInfo() {
}
static MCCFIInstruction convertMoveToCFI(const MCRegisterInfo &MRI,
MCSymbol *Label,
const MachineLocation &Dst,
const MachineLocation &Src) {
// If advancing cfa.
if (Dst.isReg() && Dst.getReg() == MachineLocation::VirtualFP) {
if (Src.getReg() == MachineLocation::VirtualFP)
return MCCFIInstruction::createDefCfaOffset(Label, Src.getOffset());
// Reg + Offset
return MCCFIInstruction::createDefCfa(
Label, MRI.getDwarfRegNum(Src.getReg(), true), -Src.getOffset());
}
if (Src.isReg() && Src.getReg() == MachineLocation::VirtualFP) {
assert(Dst.isReg() && "Machine move not supported yet.");
return MCCFIInstruction::createDefCfaRegister(
Label, MRI.getDwarfRegNum(Dst.getReg(), true));
}
assert(!Dst.isReg() && "Machine move not supported yet.");
return MCCFIInstruction::createOffset(
Label, MRI.getDwarfRegNum(Src.getReg(), true), Dst.getOffset());
}
void MachineModuleInfo::addFrameMove(MCSymbol *Label,
const MachineLocation &Dst,
const MachineLocation &Src) {
MCCFIInstruction I =
convertMoveToCFI(Context.getRegisterInfo(), Label, Dst, Src);
FrameInstructions.push_back(I);
}
bool MachineModuleInfo::doInitialization(Module &M) {
ObjFileMMI = 0;
@@ -303,7 +336,7 @@ bool MachineModuleInfo::doFinalization(Module &M) {
///
void MachineModuleInfo::EndFunction() {
// Clean up frame info.
FrameMoves.clear();
FrameInstructions.clear();
// Clean up exception info.
LandingPads.clear();