From 4ae641f4d12c60ee1aaca5e42b6de231c6a02c40 Mon Sep 17 00:00:00 2001 From: Devang Patel Date: Wed, 1 Oct 2008 23:18:38 +0000 Subject: [PATCH] Remove OptimizeForSize global. Use function attribute optsize. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@56937 91177308-0d34-0410-b5e6-96231b3b80d8 --- include/llvm/Target/TargetOptions.h | 4 ---- lib/CodeGen/LLVMTargetMachine.cpp | 2 +- lib/CodeGen/LoopAligner.cpp | 4 ++++ lib/Target/PowerPC/AsmPrinter/PPCAsmPrinter.cpp | 2 +- lib/Target/TargetMachine.cpp | 6 ------ lib/Target/X86/AsmPrinter/X86ATTAsmPrinter.cpp | 2 +- .../X86/AsmPrinter/X86IntelAsmPrinter.cpp | 2 +- lib/Target/X86/X86ISelDAGToDAG.cpp | 2 +- test/CodeGen/X86/vec_shuffle-23.ll | 1 - test/CodeGen/X86/vec_shuffle-24.ll | 17 +++++++++++++++++ 10 files changed, 26 insertions(+), 16 deletions(-) create mode 100644 test/CodeGen/X86/vec_shuffle-24.ll diff --git a/include/llvm/Target/TargetOptions.h b/include/llvm/Target/TargetOptions.h index 42011d928c0..b7b27a47ed2 100644 --- a/include/llvm/Target/TargetOptions.h +++ b/include/llvm/Target/TargetOptions.h @@ -83,10 +83,6 @@ namespace llvm { /// optimization (pop the caller's stack) providing it supports it. extern bool PerformTailCallOpt; - /// OptimizeForSize - When this flag is set, the code generator avoids - /// optimizations that increase size. - extern bool OptimizeForSize; - /// StackAlignment - Override default stack alignment for target. extern unsigned StackAlignment; diff --git a/lib/CodeGen/LLVMTargetMachine.cpp b/lib/CodeGen/LLVMTargetMachine.cpp index bd8d4999735..cd444552f7a 100644 --- a/lib/CodeGen/LLVMTargetMachine.cpp +++ b/lib/CodeGen/LLVMTargetMachine.cpp @@ -81,7 +81,7 @@ LLVMTargetMachine::addPassesToEmitFile(PassManagerBase &PM, if (addPreEmitPass(PM, Fast) && PrintMachineCode) PM.add(createMachineFunctionPrinterPass(cerr)); - if (!Fast && !OptimizeForSize) + if (!Fast) PM.add(createLoopAlignerPass()); switch (FileType) { diff --git a/lib/CodeGen/LoopAligner.cpp b/lib/CodeGen/LoopAligner.cpp index 6cca8e5badc..60e3f194305 100644 --- a/lib/CodeGen/LoopAligner.cpp +++ b/lib/CodeGen/LoopAligner.cpp @@ -58,6 +58,10 @@ bool LoopAligner::runOnMachineFunction(MachineFunction &MF) { if (!Align) return false; // Don't care about loop alignment. + const Function *F = MF.getFunction(); + if (!F->isDeclaration() && F->hasFnAttr(Attribute::OptimizeForSize)) + return false; + for (MachineFunction::iterator I = MF.begin(), E = MF.end(); I != E; ++I) { MachineBasicBlock *MBB = I; if (MLI->isLoopHeader(MBB)) diff --git a/lib/Target/PowerPC/AsmPrinter/PPCAsmPrinter.cpp b/lib/Target/PowerPC/AsmPrinter/PPCAsmPrinter.cpp index 53ba8803c7f..d8451bd1b82 100644 --- a/lib/Target/PowerPC/AsmPrinter/PPCAsmPrinter.cpp +++ b/lib/Target/PowerPC/AsmPrinter/PPCAsmPrinter.cpp @@ -776,7 +776,7 @@ bool PPCDarwinAsmPrinter::runOnMachineFunction(MachineFunction &MF) { printVisibility(CurrentFnName, F->getVisibility()); - EmitAlignment(OptimizeForSize ? 2 : 4, F); + EmitAlignment(F->hasFnAttr(Attribute::OptimizeForSize) ? 2 : 4, F); O << CurrentFnName << ":\n"; // Emit pre-function debug information. diff --git a/lib/Target/TargetMachine.cpp b/lib/Target/TargetMachine.cpp index 600a120e867..90efb74bc91 100644 --- a/lib/Target/TargetMachine.cpp +++ b/lib/Target/TargetMachine.cpp @@ -35,7 +35,6 @@ namespace llvm { Reloc::Model RelocationModel; CodeModel::Model CMModel; bool PerformTailCallOpt; - bool OptimizeForSize; unsigned StackAlignment; bool RealignStack; bool VerboseAsm; @@ -134,11 +133,6 @@ EnablePerformTailCallOpt("tailcallopt", cl::desc("Turn on tail call optimization."), cl::location(PerformTailCallOpt), cl::init(false)); -static cl::opt -EnableOptimizeForSize("optimize-size", - cl::desc("Optimize for size."), - cl::location(OptimizeForSize), - cl::init(false)); static cl::opt OverrideStackAlignment("stack-alignment", diff --git a/lib/Target/X86/AsmPrinter/X86ATTAsmPrinter.cpp b/lib/Target/X86/AsmPrinter/X86ATTAsmPrinter.cpp index 366a5429a3a..94158714423 100644 --- a/lib/Target/X86/AsmPrinter/X86ATTAsmPrinter.cpp +++ b/lib/Target/X86/AsmPrinter/X86ATTAsmPrinter.cpp @@ -153,7 +153,7 @@ void X86ATTAsmPrinter::emitFunctionHeader(const MachineFunction &MF) { SwitchToSection(TAI->SectionForGlobal(F)); - unsigned FnAlign = OptimizeForSize ? 1 : 4; + unsigned FnAlign = 4; if (!F->isDeclaration() && F->hasFnAttr(Attribute::OptimizeForSize)) FnAlign = 1; switch (F->getLinkage()) { diff --git a/lib/Target/X86/AsmPrinter/X86IntelAsmPrinter.cpp b/lib/Target/X86/AsmPrinter/X86IntelAsmPrinter.cpp index c8199c59cfb..fdec3bc7139 100644 --- a/lib/Target/X86/AsmPrinter/X86IntelAsmPrinter.cpp +++ b/lib/Target/X86/AsmPrinter/X86IntelAsmPrinter.cpp @@ -140,7 +140,7 @@ bool X86IntelAsmPrinter::runOnMachineFunction(MachineFunction &MF) { SwitchToTextSection("_text", F); - unsigned FnAlign = OptimizeForSize ? 1 : 4; + unsigned FnAlign = 4; if (!F->isDeclaration() && F->hasFnAttr(Attribute::OptimizeForSize)) FnAlign = 1; switch (F->getLinkage()) { diff --git a/lib/Target/X86/X86ISelDAGToDAG.cpp b/lib/Target/X86/X86ISelDAGToDAG.cpp index 2b7bf15d845..ea3dbad0eef 100644 --- a/lib/Target/X86/X86ISelDAGToDAG.cpp +++ b/lib/Target/X86/X86ISelDAGToDAG.cpp @@ -137,7 +137,7 @@ namespace { ContainsFPCode(false), TM(tm), X86Lowering(*TM.getTargetLowering()), Subtarget(&TM.getSubtarget()), - OptForSize(OptimizeForSize) {} + OptForSize(false) {} virtual const char *getPassName() const { return "X86 DAG->DAG Instruction Selection"; diff --git a/test/CodeGen/X86/vec_shuffle-23.ll b/test/CodeGen/X86/vec_shuffle-23.ll index 34d84ef15f9..7e8aa5dc4bf 100644 --- a/test/CodeGen/X86/vec_shuffle-23.ll +++ b/test/CodeGen/X86/vec_shuffle-23.ll @@ -1,6 +1,5 @@ ; RUN: llvm-as < %s | llc -march=x86 -mattr=+sse2 | not grep punpck ; RUN: llvm-as < %s | llc -march=x86 -mattr=+sse2 | grep pshufd -; RUN: llvm-as < %s | llc -march=x86 -mattr=+sse2 -optimize-size | grep punpck define i32 @t() nounwind { entry: diff --git a/test/CodeGen/X86/vec_shuffle-24.ll b/test/CodeGen/X86/vec_shuffle-24.ll new file mode 100644 index 00000000000..170ba35173f --- /dev/null +++ b/test/CodeGen/X86/vec_shuffle-24.ll @@ -0,0 +1,17 @@ +; RUN: llvm-as < %s | llc -march=x86 -mattr=+sse2 | grep punpck + +define i32 @t() nounwind optsize { +entry: + %a = alloca <4 x i32> ; <<4 x i32>*> [#uses=2] + %b = alloca <4 x i32> ; <<4 x i32>*> [#uses=5] + volatile store <4 x i32> < i32 0, i32 1, i32 2, i32 3 >, <4 x i32>* %a + %tmp = load <4 x i32>* %a ; <<4 x i32>> [#uses=1] + store <4 x i32> %tmp, <4 x i32>* %b + %tmp1 = load <4 x i32>* %b ; <<4 x i32>> [#uses=1] + %tmp2 = load <4 x i32>* %b ; <<4 x i32>> [#uses=1] + %punpckldq = shufflevector <4 x i32> %tmp1, <4 x i32> %tmp2, <4 x i32> < i32 0, i32 4, i32 1, i32 5 > ; <<4 x i32>> [#uses=1] + store <4 x i32> %punpckldq, <4 x i32>* %b + %tmp3 = load <4 x i32>* %b ; <<4 x i32>> [#uses=1] + %result = extractelement <4 x i32> %tmp3, i32 0 ; [#uses=1] + ret i32 %result +}