Migrate away from using a Subtarget except for the one place we want

to use it. Use the triple to determine OS format bits at the module
level.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@227947 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Eric Christopher 2015-02-03 06:40:19 +00:00
parent d54450ef63
commit 4b4315d6f4

View File

@ -43,19 +43,13 @@ using namespace llvm;
namespace {
class AArch64AsmPrinter : public AsmPrinter {
/// Subtarget - Keep a pointer to the AArch64Subtarget around so that we can
/// make the right decision when printing asm code for different targets.
const AArch64Subtarget *Subtarget;
AArch64MCInstLower MCInstLowering;
StackMaps SM;
public:
AArch64AsmPrinter(TargetMachine &TM, std::unique_ptr<MCStreamer> Streamer)
: AsmPrinter(TM, std::move(Streamer)),
Subtarget(&TM.getSubtarget<AArch64Subtarget>()),
MCInstLowering(OutContext, *this), SM(*this), AArch64FI(nullptr),
LOHLabelCounter(0) {}
: AsmPrinter(TM, std::move(Streamer)), MCInstLowering(OutContext, *this),
SM(*this), AArch64FI(nullptr), LOHLabelCounter(0) {}
const char *getPassName() const override {
return "AArch64 Assembly Printer";
@ -124,7 +118,8 @@ private:
//===----------------------------------------------------------------------===//
void AArch64AsmPrinter::EmitEndOfAsmFile(Module &M) {
if (Subtarget->isTargetMachO()) {
Triple TT(TM.getTargetTriple());
if (TT.isOSBinFormatMachO()) {
// Funny Darwin hack: This flag tells the linker that no global symbols
// contain code that falls through to other global symbols (e.g. the obvious
// implementation of multiple entry points). If this doesn't occur, the
@ -135,7 +130,7 @@ void AArch64AsmPrinter::EmitEndOfAsmFile(Module &M) {
}
// Emit a .data.rel section containing any stubs that were created.
if (Subtarget->isTargetELF()) {
if (TT.isOSBinFormatELF()) {
const TargetLoweringObjectFileELF &TLOFELF =
static_cast<const TargetLoweringObjectFileELF &>(getObjFileLowering());
@ -252,8 +247,8 @@ bool AArch64AsmPrinter::printAsmRegInClass(const MachineOperand &MO,
const TargetRegisterClass *RC,
bool isVector, raw_ostream &O) {
assert(MO.isReg() && "Should only get here with a register!");
const AArch64RegisterInfo *RI = static_cast<const AArch64RegisterInfo *>(
TM.getSubtargetImpl()->getRegisterInfo());
const AArch64RegisterInfo *RI =
MF->getSubtarget<AArch64Subtarget>().getRegisterInfo();
unsigned Reg = MO.getReg();
unsigned RegToPrint = RC->getRegister(RI->getEncodingValue(Reg));
assert(RI->regsOverlap(RegToPrint, Reg));