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McARM: Use accessors where appropriate.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@123746 91177308-0d34-0410-b5e6-96231b3b80d8
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@@ -266,11 +266,11 @@ public:
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bool isToken() const { return Kind == Token; }
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bool isToken() const { return Kind == Token; }
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bool isMemory() const { return Kind == Memory; }
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bool isMemory() const { return Kind == Memory; }
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bool isMemMode5() const {
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bool isMemMode5() const {
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if (!isMemory() || Mem.OffsetIsReg || Mem.OffsetRegShifted ||
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if (!isMemory() || getMemOffsetIsReg() || getMemWriteback() ||
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Mem.Writeback || Mem.Negative)
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getMemNegative())
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return false;
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return false;
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const MCConstantExpr *CE = dyn_cast<MCConstantExpr>(Mem.Offset.Value);
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const MCConstantExpr *CE = dyn_cast<MCConstantExpr>(getMemOffset());
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if (!CE) return false;
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if (!CE) return false;
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// The offset must be a multiple of 4 in the range 0-1020.
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// The offset must be a multiple of 4 in the range 0-1020.
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@@ -278,15 +278,15 @@ public:
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return ((Value & 0x3) == 0 && Value <= 1020 && Value >= -1020);
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return ((Value & 0x3) == 0 && Value <= 1020 && Value >= -1020);
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}
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}
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bool isMemModeRegThumb() const {
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bool isMemModeRegThumb() const {
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if (!isMemory() || !Mem.OffsetIsReg || Mem.Writeback)
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if (!isMemory() || !getMemOffsetIsReg() || getMemWriteback())
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return false;
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return false;
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return true;
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return true;
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}
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}
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bool isMemModeImmThumb() const {
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bool isMemModeImmThumb() const {
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if (!isMemory() || Mem.OffsetIsReg || Mem.Writeback)
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if (!isMemory() || getMemOffsetIsReg() || getMemWriteback())
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return false;
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return false;
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const MCConstantExpr *CE = dyn_cast<MCConstantExpr>(Mem.Offset.Value);
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const MCConstantExpr *CE = dyn_cast<MCConstantExpr>(getMemOffset());
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if (!CE) return false;
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if (!CE) return false;
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// The offset must be a multiple of 4 in the range 0-124.
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// The offset must be a multiple of 4 in the range 0-124.
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@@ -345,12 +345,12 @@ public:
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void addMemMode5Operands(MCInst &Inst, unsigned N) const {
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void addMemMode5Operands(MCInst &Inst, unsigned N) const {
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assert(N == 2 && isMemMode5() && "Invalid number of operands!");
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assert(N == 2 && isMemMode5() && "Invalid number of operands!");
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Inst.addOperand(MCOperand::CreateReg(Mem.BaseRegNum));
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Inst.addOperand(MCOperand::CreateReg(getMemBaseRegNum()));
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assert(!Mem.OffsetIsReg && "Invalid mode 5 operand");
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assert(!getMemOffsetIsReg() && "Invalid mode 5 operand");
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// FIXME: #-0 is encoded differently than #0. Does the parser preserve
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// FIXME: #-0 is encoded differently than #0. Does the parser preserve
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// the difference?
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// the difference?
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const MCConstantExpr *CE = dyn_cast<MCConstantExpr>(Mem.Offset.Value);
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const MCConstantExpr *CE = dyn_cast<MCConstantExpr>(getMemOffset());
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assert(CE && "Non-constant mode 5 offset operand!");
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assert(CE && "Non-constant mode 5 offset operand!");
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// The MCInst offset operand doesn't include the low two bits (like
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// The MCInst offset operand doesn't include the low two bits (like
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@@ -366,14 +366,14 @@ public:
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void addMemModeRegThumbOperands(MCInst &Inst, unsigned N) const {
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void addMemModeRegThumbOperands(MCInst &Inst, unsigned N) const {
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assert(N == 2 && isMemModeRegThumb() && "Invalid number of operands!");
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assert(N == 2 && isMemModeRegThumb() && "Invalid number of operands!");
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Inst.addOperand(MCOperand::CreateReg(Mem.BaseRegNum));
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Inst.addOperand(MCOperand::CreateReg(getMemBaseRegNum()));
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Inst.addOperand(MCOperand::CreateReg(Mem.Offset.RegNum));
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Inst.addOperand(MCOperand::CreateReg(getMemOffsetRegNum()));
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}
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}
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void addMemModeImmThumbOperands(MCInst &Inst, unsigned N) const {
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void addMemModeImmThumbOperands(MCInst &Inst, unsigned N) const {
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assert(N == 2 && isMemModeImmThumb() && "Invalid number of operands!");
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assert(N == 2 && isMemModeImmThumb() && "Invalid number of operands!");
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Inst.addOperand(MCOperand::CreateReg(Mem.BaseRegNum));
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Inst.addOperand(MCOperand::CreateReg(getMemBaseRegNum()));
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const MCConstantExpr *CE = dyn_cast<MCConstantExpr>(Mem.Offset.Value);
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const MCConstantExpr *CE = dyn_cast<MCConstantExpr>(getMemOffset());
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assert(CE && "Non-constant mode offset operand!");
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assert(CE && "Non-constant mode offset operand!");
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Inst.addOperand(MCOperand::CreateImm(CE->getValue()));
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Inst.addOperand(MCOperand::CreateImm(CE->getValue()));
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}
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}
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