From 4b4863188fe226c00d961ec611f2eb1ee8aac4c0 Mon Sep 17 00:00:00 2001
From: Chris Lattner <sabre@nondot.org>
Date: Sat, 17 Dec 2005 08:15:09 +0000
Subject: [PATCH] Implement ret with operand, giving us this:

int %test(int %A) {
  ret int %A
}


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24773 91177308-0d34-0410-b5e6-96231b3b80d8
---
 lib/Target/Sparc/SparcISelDAGToDAG.cpp     | 35 ++++++++++++++++++++--
 lib/Target/SparcV8/SparcV8ISelDAGToDAG.cpp | 35 ++++++++++++++++++++--
 2 files changed, 66 insertions(+), 4 deletions(-)

diff --git a/lib/Target/Sparc/SparcISelDAGToDAG.cpp b/lib/Target/Sparc/SparcISelDAGToDAG.cpp
index fcc07c29f5b..15a28f22ab8 100644
--- a/lib/Target/Sparc/SparcISelDAGToDAG.cpp
+++ b/lib/Target/Sparc/SparcISelDAGToDAG.cpp
@@ -139,8 +139,15 @@ SparcV8TargetLowering::LowerCallTo(SDOperand Chain, const Type *RetTy,
 
 SDOperand SparcV8TargetLowering::LowerReturnTo(SDOperand Chain, SDOperand Op,
                                                SelectionDAG &DAG) {
-  assert(0 && "Unimp");
-  abort();
+  if (Op.getValueType() == MVT::i64) {
+    SDOperand Hi = DAG.getNode(ISD::EXTRACT_ELEMENT, MVT::i32, Op, 
+                               DAG.getConstant(1, MVT::i32));
+    SDOperand Lo = DAG.getNode(ISD::EXTRACT_ELEMENT, MVT::i32, Op,
+                               DAG.getConstant(0, MVT::i32));
+    return DAG.getNode(ISD::RET, MVT::Other, Chain, Lo, Hi);
+  } else {
+    return DAG.getNode(ISD::RET, MVT::Other, Chain, Op);
+  }
 }
 
 SDOperand SparcV8TargetLowering::LowerVAStart(SDOperand Chain, SDOperand VAListP,
@@ -219,6 +226,30 @@ SDOperand SparcV8DAGToDAGISel::Select(SDOperand Op) {
   
   switch (N->getOpcode()) {
   default: break;
+  case ISD::RET: {
+    if (N->getNumOperands() == 2) {
+      SDOperand Chain = Select(N->getOperand(0));     // Token chain.
+      SDOperand Val = Select(N->getOperand(1));
+      if (N->getOperand(1).getValueType() == MVT::i32) {
+        Chain = CurDAG->getCopyToReg(Chain, V8::I0, Val);
+      } else if (N->getOperand(1).getValueType() == MVT::f32) {
+        Chain = CurDAG->getCopyToReg(Chain, V8::F0, Val);
+      } else {
+        assert(N->getOperand(1).getValueType() == MVT::f64);
+        Chain = CurDAG->getCopyToReg(Chain, V8::D0, Val);
+      }
+      return CurDAG->SelectNodeTo(N, V8::RETL, MVT::Other, Chain);
+    } else if (N->getNumOperands() > 1) {
+      SDOperand Chain = Select(N->getOperand(0));     // Token chain.
+      assert(N->getOperand(1).getValueType() == MVT::i32 &&
+             N->getOperand(2).getValueType() == MVT::i32 &&
+             N->getNumOperands() == 3 && "Unknown two-register ret value!");
+      Chain = CurDAG->getCopyToReg(Chain, V8::I0, Select(N->getOperand(1)));
+      Chain = CurDAG->getCopyToReg(Chain, V8::I1, Select(N->getOperand(2)));
+      return CurDAG->SelectNodeTo(N, V8::RETL, MVT::Other, Chain);
+    }
+    break;  // Generated code handles the void case.
+  }
   }
   
   return SelectCode(Op);
diff --git a/lib/Target/SparcV8/SparcV8ISelDAGToDAG.cpp b/lib/Target/SparcV8/SparcV8ISelDAGToDAG.cpp
index fcc07c29f5b..15a28f22ab8 100644
--- a/lib/Target/SparcV8/SparcV8ISelDAGToDAG.cpp
+++ b/lib/Target/SparcV8/SparcV8ISelDAGToDAG.cpp
@@ -139,8 +139,15 @@ SparcV8TargetLowering::LowerCallTo(SDOperand Chain, const Type *RetTy,
 
 SDOperand SparcV8TargetLowering::LowerReturnTo(SDOperand Chain, SDOperand Op,
                                                SelectionDAG &DAG) {
-  assert(0 && "Unimp");
-  abort();
+  if (Op.getValueType() == MVT::i64) {
+    SDOperand Hi = DAG.getNode(ISD::EXTRACT_ELEMENT, MVT::i32, Op, 
+                               DAG.getConstant(1, MVT::i32));
+    SDOperand Lo = DAG.getNode(ISD::EXTRACT_ELEMENT, MVT::i32, Op,
+                               DAG.getConstant(0, MVT::i32));
+    return DAG.getNode(ISD::RET, MVT::Other, Chain, Lo, Hi);
+  } else {
+    return DAG.getNode(ISD::RET, MVT::Other, Chain, Op);
+  }
 }
 
 SDOperand SparcV8TargetLowering::LowerVAStart(SDOperand Chain, SDOperand VAListP,
@@ -219,6 +226,30 @@ SDOperand SparcV8DAGToDAGISel::Select(SDOperand Op) {
   
   switch (N->getOpcode()) {
   default: break;
+  case ISD::RET: {
+    if (N->getNumOperands() == 2) {
+      SDOperand Chain = Select(N->getOperand(0));     // Token chain.
+      SDOperand Val = Select(N->getOperand(1));
+      if (N->getOperand(1).getValueType() == MVT::i32) {
+        Chain = CurDAG->getCopyToReg(Chain, V8::I0, Val);
+      } else if (N->getOperand(1).getValueType() == MVT::f32) {
+        Chain = CurDAG->getCopyToReg(Chain, V8::F0, Val);
+      } else {
+        assert(N->getOperand(1).getValueType() == MVT::f64);
+        Chain = CurDAG->getCopyToReg(Chain, V8::D0, Val);
+      }
+      return CurDAG->SelectNodeTo(N, V8::RETL, MVT::Other, Chain);
+    } else if (N->getNumOperands() > 1) {
+      SDOperand Chain = Select(N->getOperand(0));     // Token chain.
+      assert(N->getOperand(1).getValueType() == MVT::i32 &&
+             N->getOperand(2).getValueType() == MVT::i32 &&
+             N->getNumOperands() == 3 && "Unknown two-register ret value!");
+      Chain = CurDAG->getCopyToReg(Chain, V8::I0, Select(N->getOperand(1)));
+      Chain = CurDAG->getCopyToReg(Chain, V8::I1, Select(N->getOperand(2)));
+      return CurDAG->SelectNodeTo(N, V8::RETL, MVT::Other, Chain);
+    }
+    break;  // Generated code handles the void case.
+  }
   }
   
   return SelectCode(Op);