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This patch corrects the handling of byval arguments for tailcall

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optimized x86-64 (and x86) calls so that they work (... at least for
my test cases).

Should fix the following problems:

Problem 1: When i introduced the optimized handling of arguments for
tail called functions (using a sequence of copyto/copyfrom virtual
registers instead of always lowering to top of the stack) i did not
handle byval arguments correctly e.g they did not work at all :).

Problem 2: On x86-64 after the arguments of the tail called function
are moved to their registers (which include ESI/RSI etc), tail call
optimization performs byval lowering which causes xSI,xDI, xCX
registers to be overwritten. This is handled in this patch by moving
the arguments to virtual registers first and after the byval lowering
the arguments are moved from those virtual registers back to
RSI/RDI/RCX.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@49584 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Arnold Schwaighofer
2008-04-12 18:11:06 +00:00
parent 460a14e09c
commit 4b5324ad2c
4 changed files with 182 additions and 30 deletions
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6
test/CodeGen/X86/tailcallbyval.ll
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@@ -1,5 +1,9 @@
; RUN: llvm-as < %s | llc -march=x86 -tailcallopt | grep TAILCALL
%struct.s = type { i32, i32, i32 }
; check for the 2 byval moves
; RUN: llvm-as < %s | llc -march=x86 -tailcallopt | grep rep | wc -l | grep 2
%struct.s = type {i32, i32, i32, i32, i32, i32, i32, i32,
i32, i32, i32, i32, i32, i32, i32, i32,
i32, i32, i32, i32, i32, i32, i32, i32 }
define fastcc i32 @tailcallee(%struct.s* byval %a) {
entry: