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Incorrect check.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@37962 91177308-0d34-0410-b5e6-96231b3b80d8
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@ -312,8 +312,7 @@ bool ARMInstrInfo::AnalyzeBranch(MachineBasicBlock &MBB,MachineBasicBlock *&TBB,
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// If there is only one terminator instruction, process it.
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// If there is only one terminator instruction, process it.
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unsigned LastOpc = LastInst->getOpcode();
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unsigned LastOpc = LastInst->getOpcode();
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if (I == MBB.begin() ||
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if (I == MBB.begin() || !isUnpredicatedTerminator(--I)) {
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isPredicated(--I) || !isUnpredicatedTerminator(I)) {
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if (LastOpc == ARM::B || LastOpc == ARM::tB) {
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if (LastOpc == ARM::B || LastOpc == ARM::tB) {
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TBB = LastInst->getOperand(0).getMachineBasicBlock();
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TBB = LastInst->getOperand(0).getMachineBasicBlock();
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return false;
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return false;
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@ -332,8 +331,7 @@ bool ARMInstrInfo::AnalyzeBranch(MachineBasicBlock &MBB,MachineBasicBlock *&TBB,
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MachineInstr *SecondLastInst = I;
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MachineInstr *SecondLastInst = I;
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// If there are three terminators, we don't know what sort of block this is.
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// If there are three terminators, we don't know what sort of block this is.
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if (SecondLastInst && I != MBB.begin() &&
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if (SecondLastInst && I != MBB.begin() && isUnpredicatedTerminator(--I))
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!isPredicated(--I) && isUnpredicatedTerminator(I))
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return true;
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return true;
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// If the block ends with ARM::B/ARM::tB and a ARM::Bcc/ARM::tBcc, handle it.
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// If the block ends with ARM::B/ARM::tB and a ARM::Bcc/ARM::tBcc, handle it.
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