Incorrect check.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@37962 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Evan Cheng 2007-07-06 23:23:19 +00:00
parent 06aae67b83
commit 4b9cb7d135

View File

@ -312,8 +312,7 @@ bool ARMInstrInfo::AnalyzeBranch(MachineBasicBlock &MBB,MachineBasicBlock *&TBB,
// If there is only one terminator instruction, process it. // If there is only one terminator instruction, process it.
unsigned LastOpc = LastInst->getOpcode(); unsigned LastOpc = LastInst->getOpcode();
if (I == MBB.begin() || if (I == MBB.begin() || !isUnpredicatedTerminator(--I)) {
isPredicated(--I) || !isUnpredicatedTerminator(I)) {
if (LastOpc == ARM::B || LastOpc == ARM::tB) { if (LastOpc == ARM::B || LastOpc == ARM::tB) {
TBB = LastInst->getOperand(0).getMachineBasicBlock(); TBB = LastInst->getOperand(0).getMachineBasicBlock();
return false; return false;
@ -332,8 +331,7 @@ bool ARMInstrInfo::AnalyzeBranch(MachineBasicBlock &MBB,MachineBasicBlock *&TBB,
MachineInstr *SecondLastInst = I; MachineInstr *SecondLastInst = I;
// If there are three terminators, we don't know what sort of block this is. // If there are three terminators, we don't know what sort of block this is.
if (SecondLastInst && I != MBB.begin() && if (SecondLastInst && I != MBB.begin() && isUnpredicatedTerminator(--I))
!isPredicated(--I) && isUnpredicatedTerminator(I))
return true; return true;
// If the block ends with ARM::B/ARM::tB and a ARM::Bcc/ARM::tBcc, handle it. // If the block ends with ARM::B/ARM::tB and a ARM::Bcc/ARM::tBcc, handle it.