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LoopVectorizer: Add support for if-conversion of PHINodes with 3+ incoming values.
By supporting the vectorization of PHINodes with more than two incoming values we can increase the complexity of nested if statements. We can now vectorize this loop: int foo(int *A, int *B, int n) { for (int i=0; i < n; i++) { int x = 9; if (A[i] > B[i]) { if (A[i] > 19) { x = 3; } else if (B[i] < 4 ) { x = 4; } else { x = 5; } } A[i] = x; } } git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@181037 91177308-0d34-0410-b5e6-96231b3b80d8
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@ -1982,18 +1982,33 @@ InnerLoopVectorizer::vectorizeBlockInLoop(LoopVectorizationLegality *Legal,
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// We know that all PHIs in non header blocks are converted into
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// selects, so we don't have to worry about the insertion order and we
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// can just use the builder.
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// At this point we generate the predication tree. There may be
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// duplications since this is a simple recursive scan, but future
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// optimizations will clean it up.
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VectorParts Cond = createEdgeMask(P->getIncomingBlock(0),
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unsigned NumIncoming = P->getNumIncomingValues();
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assert(NumIncoming > 1 && "Invalid PHI");
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// Generate a sequence of selects of the form:
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// SELECT(Mask3, In3,
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// SELECT(Mask2, In2,
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// ( ...)))
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for (unsigned In = 0; In < NumIncoming; In++) {
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VectorParts Cond = createEdgeMask(P->getIncomingBlock(In),
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P->getParent());
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VectorParts &In0 = getVectorValue(P->getIncomingValue(In));
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for (unsigned part = 0; part < UF; ++part) {
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VectorParts &In0 = getVectorValue(P->getIncomingValue(0));
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VectorParts &In1 = getVectorValue(P->getIncomingValue(1));
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Entry[part] = Builder.CreateSelect(Cond[part], In0[part], In1[part],
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"predphi");
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// We don't need to 'select' the first PHI operand because it is
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// the default value if all of the other masks don't match.
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if (In == 0)
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Entry[part] = In0[part];
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else
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// Select between the current value and the previous incoming edge
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// based on the incoming mask.
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Entry[part] = Builder.CreateSelect(Cond[part], In0[part],
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Entry[part], "predphi");
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}
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}
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continue;
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}
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@ -2273,12 +2288,6 @@ bool LoopVectorizationLegality::canVectorizeWithIfConvert() {
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if (!isa<BranchInst>(BB->getTerminator()))
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return false;
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// We must have at most two predecessors because we need to convert
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// all PHIs to selects.
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unsigned Preds = std::distance(pred_begin(BB), pred_end(BB));
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if (Preds > 2)
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return false;
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// We must be able to predicate all blocks that need to be predicated.
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if (blockNeedsPredication(BB) && !blockCanBePredicated(BB))
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return false;
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@ -2376,12 +2385,6 @@ bool LoopVectorizationLegality::canVectorizeInstrs() {
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++it) {
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if (PHINode *Phi = dyn_cast<PHINode>(it)) {
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// This should not happen because the loop should be normalized.
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if (Phi->getNumIncomingValues() != 2) {
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DEBUG(dbgs() << "LV: Found an invalid PHI.\n");
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return false;
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}
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// Check that this PHI type is allowed.
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if (!Phi->getType()->isIntegerTy() &&
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!Phi->getType()->isFloatingPointTy() &&
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@ -2396,6 +2399,12 @@ bool LoopVectorizationLegality::canVectorizeInstrs() {
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if (*bb != Header)
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continue;
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// We only allow if-converted PHIs with more than two incoming values.
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if (Phi->getNumIncomingValues() != 2) {
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DEBUG(dbgs() << "LV: Found an invalid PHI.\n");
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return false;
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}
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// This is the value coming from the preheader.
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Value *StartValue = Phi->getIncomingValueForBlock(PreHeader);
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// Check if this is an induction variable.
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48
test/Transforms/LoopVectorize/if-conversion-nest.ll
Normal file
48
test/Transforms/LoopVectorize/if-conversion-nest.ll
Normal file
@ -0,0 +1,48 @@
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; RUN: opt < %s -loop-vectorize -force-vector-unroll=1 -force-vector-width=4 -enable-if-conversion -dce -instcombine -S | FileCheck %s
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target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128-n8:16:32:64-S128"
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;CHECK: @foo
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;CHECK: icmp sgt
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;CHECK: icmp sgt
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;CHECK: icmp slt
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;CHECK: select <4 x i1>
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;CHECK: %[[P1:.*]] = select <4 x i1>
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;CHECK: xor <4 x i1>
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;CHECK: and <4 x i1>
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;CHECK: select <4 x i1> %{{.*}}, <4 x i32> %{{.*}}, <4 x i32> %[[P1]]
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;CHECK: ret
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define i32 @foo(i32* nocapture %A, i32* nocapture %B, i32 %n) {
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entry:
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%cmp26 = icmp sgt i32 %n, 0
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br i1 %cmp26, label %for.body, label %for.end
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for.body:
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%indvars.iv = phi i64 [ %indvars.iv.next, %if.end14 ], [ 0, %entry ]
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%arrayidx = getelementptr inbounds i32* %A, i64 %indvars.iv
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%0 = load i32* %arrayidx, align 4
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%arrayidx2 = getelementptr inbounds i32* %B, i64 %indvars.iv
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%1 = load i32* %arrayidx2, align 4
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%cmp3 = icmp sgt i32 %0, %1
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br i1 %cmp3, label %if.then, label %if.end14
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if.then:
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%cmp6 = icmp sgt i32 %0, 19
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br i1 %cmp6, label %if.end14, label %if.else
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if.else:
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%cmp10 = icmp slt i32 %1, 4
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%. = select i1 %cmp10, i32 4, i32 5
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br label %if.end14
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if.end14:
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%x.0 = phi i32 [ 9, %for.body ], [ 3, %if.then ], [ %., %if.else ] ; <------------- A PHI with 3 entries that we can still vectorize.
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store i32 %x.0, i32* %arrayidx, align 4
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%indvars.iv.next = add i64 %indvars.iv, 1
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%lftr.wideiv = trunc i64 %indvars.iv.next to i32
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%exitcond = icmp eq i32 %lftr.wideiv, %n
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br i1 %exitcond, label %for.end, label %for.body
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for.end:
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ret i32 undef
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}
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