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Revert 224119 "This patch recognizes (+ (+ v0, v1) (+ v2, v3)), reorders them for bundling into vector of loads,
and vectorizes it." This was re-ordering floating point data types resulting in mismatch in output. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@224424 91177308-0d34-0410-b5e6-96231b3b80d8
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@ -439,13 +439,6 @@ public:
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/// \returns true if the memory operations A and B are consecutive.
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bool isConsecutiveAccess(Value *A, Value *B);
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/// For consecutive loads (+(+ v0, v1)(+ v2, v3)), Left had v0 and v2
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/// while Right had v1 and v3, which prevented bundling them into
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/// a vector of loads. Rorder them so that Left now has v0 and v1
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/// while Right has v2 and v3 enabling their bundling into a vector.
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void reorderIfConsecutiveLoads(SmallVectorImpl<Value *> &Left,
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SmallVectorImpl<Value *> &Right);
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/// \brief Perform LICM and CSE on the newly generated gather sequences.
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void optimizeGatherSequence();
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@ -1241,7 +1234,6 @@ void BoUpSLP::buildTree_rec(ArrayRef<Value *> VL, unsigned Depth) {
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if (isa<BinaryOperator>(VL0) && VL0->isCommutative()) {
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ValueList Left, Right;
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reorderInputsAccordingToOpcode(VL, Left, Right);
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reorderIfConsecutiveLoads (Left, Right);
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buildTree_rec(Left, Depth + 1);
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buildTree_rec(Right, Depth + 1);
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return;
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@ -1826,19 +1818,6 @@ bool BoUpSLP::isConsecutiveAccess(Value *A, Value *B) {
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return X == PtrSCEVB;
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}
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void BoUpSLP::reorderIfConsecutiveLoads(SmallVectorImpl<Value *> &Left,
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SmallVectorImpl<Value *> &Right) {
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for (unsigned i = 0, e = Left.size(); i < e - 1; ++i) {
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if (!isa<LoadInst>(Left[i]) || !isa<LoadInst>(Right[i]))
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return;
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if (!(isConsecutiveAccess(Left[i], Right[i]) &&
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isConsecutiveAccess(Right[i], Left[i + 1])))
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continue;
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else
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std::swap(Left[i + 1], Right[i]);
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}
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}
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void BoUpSLP::setInsertPointAfterBundle(ArrayRef<Value *> VL) {
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Instruction *VL0 = cast<Instruction>(VL[0]);
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BasicBlock::iterator NextInst = VL0;
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@ -2069,10 +2048,9 @@ Value *BoUpSLP::vectorizeTree(TreeEntry *E) {
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case Instruction::Or:
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case Instruction::Xor: {
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ValueList LHSVL, RHSVL;
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if (isa<BinaryOperator>(VL0) && VL0->isCommutative()) {
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if (isa<BinaryOperator>(VL0) && VL0->isCommutative())
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reorderInputsAccordingToOpcode(E->Scalars, LHSVL, RHSVL);
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reorderIfConsecutiveLoads(LHSVL, RHSVL);
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} else
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else
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for (int i = 0, e = E->Scalars.size(); i < e; ++i) {
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LHSVL.push_back(cast<Instruction>(E->Scalars[i])->getOperand(0));
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RHSVL.push_back(cast<Instruction>(E->Scalars[i])->getOperand(1));
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@ -1,27 +0,0 @@
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; RUN: opt < %s -basicaa -slp-vectorizer -S -mtriple=aarch64-unknown-linux-gnu -mcpu=cortex-a57 | FileCheck %s
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target datalayout = "e-m:e-i64:64-i128:128-n32:64-S128"
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target triple = "aarch64--linux-gnu"
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; float hadd (float *a) {
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; return (a[0] + a[1]) + (a[2] + a[3]);
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; }
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; CHECK-LABEL: @hadd
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; CHECK: load <2 x float>*
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; CHECK: fadd <2 x float>
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; CHECK: extractelement <2 x float>
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define float @hadd(float* nocapture readonly %a) {
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entry:
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%0 = load float* %a, align 4
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%arrayidx1 = getelementptr inbounds float* %a, i64 1
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%1 = load float* %arrayidx1, align 4
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%add = fadd float %0, %1
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%arrayidx2 = getelementptr inbounds float* %a, i64 2
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%2 = load float* %arrayidx2, align 4
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%arrayidx3 = getelementptr inbounds float* %a, i64 3
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%3 = load float* %arrayidx3, align 4
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%add4 = fadd float %2, %3
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%add5 = fadd float %add, %add4
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ret float %add5
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}
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