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Add some hooks for selecting memory addresses.

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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26347 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Chris Lattner 2006-02-24 02:12:52 +00:00
parent 87bc3bd121
commit 4c12e719c9
1 changed files with 17 additions and 0 deletions
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17
include/llvm/CodeGen/SelectionDAGISel.h
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@ -49,11 +49,28 @@ public:
virtual void EmitFunctionEntryCode(Function &Fn, MachineFunction &MF) {}
virtual void InstructionSelectBasicBlock(SelectionDAG &SD) = 0;
/// SelectInlineAsmMemoryOperand - Select the specified address as a target
/// addressing mode, according to the specified constraint code. If this does
/// not match or is not implemented, return true. The resultant operands
/// (which will appear in the machine instruction) should be added to the
/// OutOps vector.
virtual bool SelectInlineAsmMemoryOperand(const SDOperand &Op,
char ConstraintCode,
std::vector<SDOperand> &OutOps,
SelectionDAG &DAG) {
return true;
}
protected:
/// Pick a safe ordering and emit instructions for each target node in the
/// graph.
void ScheduleAndEmitDAG(SelectionDAG &DAG);
/// SelectInlineAsmMemoryOperands - Calls to this are automatically generated
/// by tblgen. Others should not call it.
void SelectInlineAsmMemoryOperands(std::vector<SDOperand> &Ops,
SelectionDAG &DAG);
private:
SDOperand CopyValueToVirtualRegister(SelectionDAGLowering &SDL,
Value *V, unsigned Reg);