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Hexagon: Remove unused variables.

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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@146846 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Benjamin Kramer 2011-12-18 12:00:09 +00:00
parent 2e6119429f
commit 4c1ea552c5
2 changed files with 0 additions and 13 deletions
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8
lib/Target/Hexagon/HexagonISelDAGToDAG.cpp
View File

@ -295,7 +295,6 @@ static bool OffsetFitsS11(EVT MemType, int64_t Offset) {
// CONST32.
//
SDNode *HexagonDAGToDAGISel::SelectBaseOffsetLoad(LoadSDNode *LD, DebugLoc dl) {
EVT LoadedVT = LD->getMemoryVT();
SDValue Chain = LD->getChain();
SDNode* Const32 = LD->getBasePtr().getNode();
unsigned Opcode = 0;
@ -767,7 +766,6 @@ SDNode *HexagonDAGToDAGISel::SelectMul(SDNode *N) {
SelectCode(N);
}
SDValue Base = LD->getBasePtr();
SDValue Chain = LD->getChain();
SDValue TargetConst0 = CurDAG->getTargetConstant(0, MVT::i32);
OP0 = SDValue (CurDAG->getMachineNode(Hexagon::LDriw, dl, MVT::i32,
@ -794,7 +792,6 @@ SDNode *HexagonDAGToDAGISel::SelectMul(SDNode *N) {
return SelectCode(N);
}
SDValue Base = LD->getBasePtr();
SDValue Chain = LD->getChain();
SDValue TargetConst0 = CurDAG->getTargetConstant(0, MVT::i32);
OP1 = SDValue (CurDAG->getMachineNode(Hexagon::LDriw, dl, MVT::i32,
@ -949,7 +946,6 @@ SDNode *HexagonDAGToDAGISel::SelectTruncate(SDNode *N) {
return SelectCode(N);
}
SDValue Base = LD->getBasePtr();
SDValue Chain = LD->getChain();
SDValue TargetConst0 = CurDAG->getTargetConstant(0, MVT::i32);
OP0 = SDValue (CurDAG->getMachineNode(Hexagon::LDriw, dl, MVT::i32,
@ -975,7 +971,6 @@ SDNode *HexagonDAGToDAGISel::SelectTruncate(SDNode *N) {
return SelectCode(N);
}
SDValue Base = LD->getBasePtr();
SDValue Chain = LD->getChain();
SDValue TargetConst0 = CurDAG->getTargetConstant(0, MVT::i32);
OP1 = SDValue (CurDAG->getMachineNode(Hexagon::LDriw, dl, MVT::i32,
@ -1175,9 +1170,6 @@ SDNode *HexagonDAGToDAGISel::SelectConstant(SDNode *N) {
SDNode* Result;
int32_t Val = cast<ConstantSDNode>(N)->getSExtValue();
if (Val == -1) {
unsigned NewIntReg = TM.getInstrInfo()->createVR(MF, MVT(MVT::i32));
SDValue Reg = CurDAG->getRegister(NewIntReg, MVT::i32);
// Create the IntReg = 1 node.
SDNode* IntRegTFR =
CurDAG->getMachineNode(Hexagon::TFRI, dl, MVT::i32,

5
lib/Target/Hexagon/HexagonISelLowering.cpp
View File

@ -305,9 +305,6 @@ HexagonTargetLowering::LowerReturn(SDValue Chain,
// Analyze return values of ISD::RET
CCInfo.AnalyzeReturn(Outs, RetCC_Hexagon);
SDValue StackPtr = DAG.getRegister(TM.getRegisterInfo()->getStackRegister(),
MVT::i32);
// If this is the first return lowered for this function, add the regs to the
// liveout set for the function.
if (DAG.getMachineFunction().getRegInfo().liveout_empty()) {
@ -320,8 +317,6 @@ HexagonTargetLowering::LowerReturn(SDValue Chain,
// Copy the result values into the output registers.
for (unsigned i = 0; i != RVLocs.size(); ++i) {
CCValAssign &VA = RVLocs[i];
SDValue Ret = OutVals[i];
ISD::ArgFlagsTy Flags = Outs[i].Flags;
Chain = DAG.getCopyToReg(Chain, dl, VA.getLocReg(), OutVals[i], Flag);