diff --git a/lib/CodeGen/SelectionDAG/DAGCombiner.cpp b/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
index 2b521878600..6cef23981ca 100644
--- a/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
+++ b/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
@@ -3202,19 +3202,6 @@ SDValue DAGCombiner::visitZERO_EXTEND(SDNode *N) {
                        X, DAG.getConstant(Mask, VT));
   }
 
-  // Fold (zext (and x, cst)) -> (and (zext x), cst)
-  if (N0.getOpcode() == ISD::AND &&
-      N0.getOperand(1).getOpcode() == ISD::Constant &&
-      N0.getOperand(0).getOpcode() != ISD::TRUNCATE &&
-      N0.getOperand(0).hasOneUse()) {
-    APInt Mask = cast<ConstantSDNode>(N0.getOperand(1))->getAPIntValue();
-    Mask.zext(VT.getSizeInBits());
-    return DAG.getNode(ISD::AND, N->getDebugLoc(), VT,
-                       DAG.getNode(ISD::ZERO_EXTEND, N->getDebugLoc(), VT,
-                                   N0.getOperand(0)),
-                       DAG.getConstant(Mask, VT));
-  }
-
   // fold (zext (load x)) -> (zext (truncate (zextload x)))
   if (ISD::isNON_EXTLoad(N0.getNode()) &&
       ((!LegalOperations && !cast<LoadSDNode>(N0)->isVolatile()) ||
diff --git a/test/CodeGen/CellSPU/and_ops.ll b/test/CodeGen/CellSPU/and_ops.ll
index 716de2ee83c..139e97b967a 100644
--- a/test/CodeGen/CellSPU/and_ops.ll
+++ b/test/CodeGen/CellSPU/and_ops.ll
@@ -1,9 +1,9 @@
 ; RUN: llc < %s -march=cellspu > %t1.s
-; RUN: grep and    %t1.s | count 230
+; RUN: grep and    %t1.s | count 234
 ; RUN: grep andc   %t1.s | count 85
-; RUN: grep andi   %t1.s | count 39
-; RUN: grep andhi  %t1.s | count 28
-; RUN: grep andbi  %t1.s | count 2
+; RUN: grep andi   %t1.s | count 37
+; RUN: grep andhi  %t1.s | count 30
+; RUN: grep andbi  %t1.s | count 4
 
 target datalayout = "E-p:32:32:128-f64:64:128-f32:32:128-i64:32:128-i32:32:128-i16:16:128-i8:8:128-i1:8:128-a0:0:128-v128:128:128-s0:128:128"
 target triple = "spu"