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Provide a target override for the latest regalloc heuristic.

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This is a temporary workaround for native arm linux builds:
PR18996: Changing regalloc order breaks "lencod" on native arm linux builds.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@202433 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Andrew Trick
2014-02-27 21:37:33 +00:00
parent 594e2aa61e
commit 4c34f71b81
4 changed files with 14 additions and 1 deletions
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lib/CodeGen/RegAllocGreedy.cpp
+1 -1
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@@ -457,7 +457,7 @@ void RAGreedy::enqueue(PQueue &CurQueue, LiveInterval *LI) {
// Giant live ranges fall back to the global assignment heuristic, which
// prevents excessive spilling in pathological cases.
bool ReverseLocal = TRI->reverseLocalAssignment();
bool ForceGlobal = !ReverseLocal &&
bool ForceGlobal = !ReverseLocal && TRI->mayOverrideLocalAssignment() &&
(Size / SlotIndex::InstrDist) > (2 * MRI->getRegClass(Reg)->getNumRegs());
if (ExtraRegInfo[Reg].Stage == RS_Assign && !ForceGlobal && !LI->empty() &&