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mi-sched: Precompute a PressureDiff for each instruction, adjust for liveness later.
Created SUPressureDiffs array to hold the per node PDiff computed during DAG building. Added a getUpwardPressureDelta API that will soon replace the old one. Compute PressureDelta here from the precomputed PressureDiffs. Updating for liveness will come next. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@189640 91177308-0d34-0410-b5e6-96231b3b80d8
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@@ -690,7 +690,8 @@ void ScheduleDAGInstrs::initSUnits() {
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/// DAG builder is an efficient place to do it because it already visits
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/// operands.
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void ScheduleDAGInstrs::buildSchedGraph(AliasAnalysis *AA,
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RegPressureTracker *RPTracker) {
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RegPressureTracker *RPTracker,
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PressureDiffs *PDiffs) {
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const TargetSubtargetInfo &ST = TM.getSubtarget<TargetSubtargetInfo>();
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bool UseAA = EnableAASchedMI.getNumOccurrences() > 0 ? EnableAASchedMI
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: ST.useAA();
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@@ -699,6 +700,9 @@ void ScheduleDAGInstrs::buildSchedGraph(AliasAnalysis *AA,
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// Create an SUnit for each real instruction.
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initSUnits();
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if (PDiffs)
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PDiffs->init(SUnits.size());
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// We build scheduling units by walking a block's instruction list from bottom
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// to top.
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@@ -746,17 +750,18 @@ void ScheduleDAGInstrs::buildSchedGraph(AliasAnalysis *AA,
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DbgMI = MI;
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continue;
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}
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SUnit *SU = MISUnitMap[MI];
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assert(SU && "No SUnit mapped to this MI");
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if (RPTracker) {
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RPTracker->recede();
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PressureDiff *PDiff = PDiffs ? &(*PDiffs)[SU->NodeNum] : 0;
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RPTracker->recede(PDiff);
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assert(RPTracker->getPos() == prior(MII) && "RPTracker can't find MI");
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}
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assert((CanHandleTerminators || (!MI->isTerminator() && !MI->isLabel())) &&
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"Cannot schedule terminators or labels!");
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SUnit *SU = MISUnitMap[MI];
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assert(SU && "No SUnit mapped to this MI");
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// Add register-based dependencies (data, anti, and output).
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bool HasVRegDef = false;
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for (unsigned j = 0, n = MI->getNumOperands(); j != n; ++j) {
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