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Thumb parsing and encoding for STR.
Not including tSTRspi. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138347 91177308-0d34-0410-b5e6-96231b3b80d8
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@ -435,3 +435,25 @@ _func:
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@ CHECK: stm r1!, {r2, r6} @ encoding: [0x44,0xc1]
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@ CHECK: stm r1!, {r2, r6} @ encoding: [0x44,0xc1]
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@ CHECK: stm r1!, {r1, r2, r3, r7} @ encoding: [0x8e,0xc1]
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@ CHECK: stm r1!, {r1, r2, r3, r7} @ encoding: [0x8e,0xc1]
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@------------------------------------------------------------------------------
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@ STR (immediate)
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@------------------------------------------------------------------------------
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str r2, [r7]
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str r2, [r7, #0]
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str r5, [r1, #4]
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str r3, [r7, #124]
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@ CHECK: str r2, [r7] @ encoding: [0x3a,0x60]
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@ CHECK: str r2, [r7] @ encoding: [0x3a,0x60]
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@ CHECK: str r5, [r1, #4] @ encoding: [0x4d,0x60]
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@ CHECK: str r3, [r7, #124] @ encoding: [0xfb,0x67]
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@------------------------------------------------------------------------------
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@ STR (register)
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@------------------------------------------------------------------------------
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str r2, [r7, r3]
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@ CHECK: str r2, [r7, r3] @ encoding: [0xfa,0x50]
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@ -93,3 +93,18 @@ error: invalid operand for instruction
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@ CHECK-ERRORS: error: destination register must match source register
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@ CHECK-ERRORS: error: destination register must match source register
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@ CHECK-ERRORS: muls r1, r2, r3
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@ CHECK-ERRORS: muls r1, r2, r3
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@ CHECK-ERRORS: ^
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@ CHECK-ERRORS: ^
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@ Out of range immediates for STR instruction.
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str r2, [r7, #-1]
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str r5, [r1, #3]
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str r3, [r7, #128]
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@ CHECK-ERRORS: error: instruction requires a CPU feature not currently enabled
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@ CHECK-ERRORS: str r2, [r7, #-1]
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@ CHECK-ERRORS: ^
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@ CHECK-ERRORS: error: instruction requires a CPU feature not currently enabled
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@ CHECK-ERRORS: str r5, [r1, #3]
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@ CHECK-ERRORS: ^
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@ CHECK-ERRORS: error: instruction requires a CPU feature not currently enabled
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@ CHECK-ERRORS: str r3, [r7, #128]
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@ CHECK-ERRORS: ^
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