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Thumb parsing and encoding for STR.

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Not including tSTRspi.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138347 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Jim Grosbach 2011-08-23 18:33:38 +00:00
parent 3395fe1e4b
commit 4c821d800a
2 changed files with 37 additions and 0 deletions
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22
test/MC/ARM/basic-thumb-instructions.s
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@ -435,3 +435,25 @@ _func:
@ CHECK: stm r1!, {r2, r6} @ encoding: [0x44,0xc1]
@ CHECK: stm r1!, {r1, r2, r3, r7} @ encoding: [0x8e,0xc1]
@------------------------------------------------------------------------------
@ STR (immediate)
@------------------------------------------------------------------------------
str r2, [r7]
str r2, [r7, #0]
str r5, [r1, #4]
str r3, [r7, #124]
@ CHECK: str r2, [r7] @ encoding: [0x3a,0x60]
@ CHECK: str r2, [r7] @ encoding: [0x3a,0x60]
@ CHECK: str r5, [r1, #4] @ encoding: [0x4d,0x60]
@ CHECK: str r3, [r7, #124] @ encoding: [0xfb,0x67]
@------------------------------------------------------------------------------
@ STR (register)
@------------------------------------------------------------------------------
str r2, [r7, r3]
@ CHECK: str r2, [r7, r3] @ encoding: [0xfa,0x50]

15
test/MC/ARM/thumb-diagnostics.s
View File

@ -93,3 +93,18 @@ error: invalid operand for instruction
@ CHECK-ERRORS: error: destination register must match source register
@ CHECK-ERRORS: muls r1, r2, r3
@ CHECK-ERRORS: ^
@ Out of range immediates for STR instruction.
str r2, [r7, #-1]
str r5, [r1, #3]
str r3, [r7, #128]
@ CHECK-ERRORS: error: instruction requires a CPU feature not currently enabled
@ CHECK-ERRORS: str r2, [r7, #-1]
@ CHECK-ERRORS: ^
@ CHECK-ERRORS: error: instruction requires a CPU feature not currently enabled
@ CHECK-ERRORS: str r5, [r1, #3]
@ CHECK-ERRORS: ^
@ CHECK-ERRORS: error: instruction requires a CPU feature not currently enabled
@ CHECK-ERRORS: str r3, [r7, #128]
@ CHECK-ERRORS: ^