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comment cleanup; NFC
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@233293 91177308-0d34-0410-b5e6-96231b3b80d8
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@ -11972,6 +11972,7 @@ SDValue DAGCombiner::visitVECTOR_SHUFFLE(SDNode *N) {
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// Canonicalize any other splat as a build_vector.
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const SDValue &Splatted = V->getOperand(SVN->getSplatIndex());
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if (isa<ConstantSDNode>(Splatted) || isa<ConstantFPSDNode>(Splatted)) {
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SmallVector<SDValue, 8> Ops(NumElts, Splatted);
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SDValue NewBV = DAG.getNode(ISD::BUILD_VECTOR, SDLoc(N),
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V->getValueType(0), Ops);
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@ -11981,6 +11982,7 @@ SDValue DAGCombiner::visitVECTOR_SHUFFLE(SDNode *N) {
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if (V->getValueType(0) != VT)
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NewBV = DAG.getNode(ISD::BITCAST, SDLoc(N), VT, NewBV);
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return NewBV;
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}
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}
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}
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@ -6989,8 +6989,8 @@ static SDValue lowerVectorShuffleAsBroadcast(SDLoc DL, MVT VT, SDValue V,
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"a sorted mask where the broadcast "
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"comes from V1.");
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// Go up the chain of (vector) values to try and find a scalar load that
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// we can combine with the broadcast.
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// Go up the chain of (vector) values to find a scalar load that we can
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// combine with the broadcast.
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for (;;) {
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switch (V.getOpcode()) {
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case ISD::CONCAT_VECTORS: {
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@ -7027,12 +7027,12 @@ static SDValue lowerVectorShuffleAsBroadcast(SDLoc DL, MVT VT, SDValue V,
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(V.getOpcode() == ISD::SCALAR_TO_VECTOR && BroadcastIdx == 0)) {
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V = V.getOperand(BroadcastIdx);
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// If the scalar isn't a load we can't broadcast from it in AVX1, only with
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// AVX2.
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// If the scalar isn't a load, we can't broadcast from it in AVX1.
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// Only AVX2 has register broadcasts.
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if (!Subtarget->hasAVX2() && !isShuffleFoldableLoad(V))
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return SDValue();
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} else if (BroadcastIdx != 0 || !Subtarget->hasAVX2()) {
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// We can't broadcast from a vector register w/o AVX2, and we can only
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// We can't broadcast from a vector register without AVX2, and we can only
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// broadcast from the zero-element of a vector register.
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return SDValue();
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}
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