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Relax assertion to make this function work with a broader class of instructions
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@12836 91177308-0d34-0410-b5e6-96231b3b80d8
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@ -449,11 +449,17 @@ void FPS::handleOneArgFP(MachineBasicBlock::iterator &I) {
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}
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/// handleOneArgFPRW - fchs - ST(0) = -ST(0)
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/// handleOneArgFPRW: Handle instructions that read from the top of stack and
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/// replace the value with a newly computed value. These instructions may have
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/// non-fp operands after their FP operands.
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///
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/// Examples:
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/// R1 = fchs R2
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/// R1 = fadd R2, [mem]
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///
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void FPS::handleOneArgFPRW(MachineBasicBlock::iterator &I) {
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MachineInstr *MI = I;
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assert(MI->getNumOperands() == 2 && "Can only handle fst* instructions!");
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assert(MI->getNumOperands() >= 2 && "FPRW instructions must have 2 ops!!");
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// Is this the last use of the source register?
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unsigned Reg = getFPReg(MI->getOperand(1));
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@ -449,11 +449,17 @@ void FPS::handleOneArgFP(MachineBasicBlock::iterator &I) {
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}
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/// handleOneArgFPRW - fchs - ST(0) = -ST(0)
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/// handleOneArgFPRW: Handle instructions that read from the top of stack and
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/// replace the value with a newly computed value. These instructions may have
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/// non-fp operands after their FP operands.
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///
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/// Examples:
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/// R1 = fchs R2
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/// R1 = fadd R2, [mem]
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///
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void FPS::handleOneArgFPRW(MachineBasicBlock::iterator &I) {
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MachineInstr *MI = I;
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assert(MI->getNumOperands() == 2 && "Can only handle fst* instructions!");
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assert(MI->getNumOperands() >= 2 && "FPRW instructions must have 2 ops!!");
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// Is this the last use of the source register?
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unsigned Reg = getFPReg(MI->getOperand(1));
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