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Fix a typo in the dag combiner, so that this can work on i64 targets

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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23856 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Nate Begeman 2005-10-21 01:51:45 +00:00
parent fe9234db9b
commit 4d38567689
1 changed files with 2 additions and 3 deletions
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5
lib/CodeGen/SelectionDAG/DAGCombiner.cpp
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@ -2607,9 +2607,8 @@ SDOperand DAGCombiner::BuildSDIV(SDNode *N) {
}
// Extract the sign bit and add it to the quotient
SDOperand T =
DAG.getNode(ISD::SRL, MVT::i32, Q,
DAG.getConstant(MVT::getSizeInBits(VT)-1,
TLI.getShiftAmountTy()));
DAG.getNode(ISD::SRL, VT, Q, DAG.getConstant(MVT::getSizeInBits(VT)-1,
TLI.getShiftAmountTy()));
WorkList.push_back(T.Val);
return DAG.getNode(ISD::ADD, VT, Q, T);
}