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ARM expansion of pre-indexed store pseudos should maintain memoperands.

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Partial fix for rdar://9945172.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137513 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Jim Grosbach 2011-08-12 21:02:34 +00:00
parent 746c882538
commit 4dfe220ad5
1 changed files with 3 additions and 1 deletions
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4
lib/Target/ARM/ARMISelLowering.cpp
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@ -5300,13 +5300,15 @@ ARMTargetLowering::EmitInstrWithCustomInserter(MachineInstr *MI,
if (isSub)
Offset = -Offset;
MachineMemOperand *MMO = *MI->memoperands_begin();
MachineInstrBuilder MIB = BuildMI(*BB, MI, dl, TII->get(NewOpc))
.addOperand(MI->getOperand(0)) // Rn_wb
.addOperand(MI->getOperand(1)) // Rt
.addOperand(MI->getOperand(2)) // Rn
.addImm(Offset) // offset (skip GPR==zero_reg)
.addOperand(MI->getOperand(5)) // pred
.addOperand(MI->getOperand(6));
.addOperand(MI->getOperand(6))
.addMemOperand(MMO);
MI->eraseFromParent();
return BB;
}