From 4e10936b38fa3790a3057ad82408949923427191 Mon Sep 17 00:00:00 2001 From: Juergen Ributzka Date: Mon, 15 Sep 2014 21:27:54 +0000 Subject: [PATCH] [FastISel][AArch64] Refactor code to use isTypeSupported. NFC. Gets rid of isLoadStoreTypeLegal and replace it with isTypeSupported. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@217826 91177308-0d34-0410-b5e6-96231b3b80d8 --- lib/Target/AArch64/AArch64FastISel.cpp | 25 ++++++------------------- 1 file changed, 6 insertions(+), 19 deletions(-) diff --git a/lib/Target/AArch64/AArch64FastISel.cpp b/lib/Target/AArch64/AArch64FastISel.cpp index 0577a8d5981..bbcb3bc2994 100644 --- a/lib/Target/AArch64/AArch64FastISel.cpp +++ b/lib/Target/AArch64/AArch64FastISel.cpp @@ -135,8 +135,7 @@ private: // Utility helper routines. bool isTypeLegal(Type *Ty, MVT &VT); - bool isLoadStoreTypeLegal(Type *Ty, MVT &VT); - bool isTypeSupported(Type *Ty, MVT &VT); + bool isTypeSupported(Type *Ty, MVT &VT, bool IsVectorAllowed = false); bool isValueAvailable(const Value *V) const; bool ComputeAddress(const Value *Obj, Address &Addr, Type *Ty = nullptr); bool ComputeCallAddress(const Value *V, Address &Addr); @@ -676,25 +675,12 @@ bool AArch64FastISel::isTypeLegal(Type *Ty, MVT &VT) { return TLI.isTypeLegal(VT); } -bool AArch64FastISel::isLoadStoreTypeLegal(Type *Ty, MVT &VT) { - if (isTypeLegal(Ty, VT)) - return true; - - // If this is a type than can be sign or zero-extended to a basic operation - // go ahead and accept it now. For stores, this reflects truncation. - if (VT == MVT::i1 || VT == MVT::i8 || VT == MVT::i16) - return true; - - return false; -} - /// \brief Determine if the value type is supported by FastISel. /// /// FastISel for AArch64 can handle more value types than are legal. This adds /// simple value type such as i1, i8, and i16. -/// Vectors on the other side are not supported yet. -bool AArch64FastISel::isTypeSupported(Type *Ty, MVT &VT) { - if (Ty->isVectorTy()) +bool AArch64FastISel::isTypeSupported(Type *Ty, MVT &VT, bool IsVectorAllowed) { + if (Ty->isVectorTy() && !IsVectorAllowed) return false; if (isTypeLegal(Ty, VT)) @@ -1486,7 +1472,8 @@ bool AArch64FastISel::SelectLoad(const Instruction *I) { // Verify we have a legal type before going any further. Currently, we handle // simple types that will directly fit in a register (i32/f32/i64/f64) or // those that can be sign or zero-extended to a basic operation (i1/i8/i16). - if (!isLoadStoreTypeLegal(I->getType(), VT) || cast(I)->isAtomic()) + if (!isTypeSupported(I->getType(), VT, /*IsVectorAllowed=*/true) || + cast(I)->isAtomic()) return false; // See if we can handle this address. @@ -1583,7 +1570,7 @@ bool AArch64FastISel::SelectStore(const Instruction *I) { // Verify we have a legal type before going any further. Currently, we handle // simple types that will directly fit in a register (i32/f32/i64/f64) or // those that can be sign or zero-extended to a basic operation (i1/i8/i16). - if (!isLoadStoreTypeLegal(Op0->getType(), VT) || + if (!isTypeSupported(Op0->getType(), VT, /*IsVectorAllowed=*/true) || cast(I)->isAtomic()) return false;