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Don't rely on the fact that shift values are never very large, and thus
this substraction will result in small negative numbers at worst which become very large positive numbers on assignment and are thus caught by the <=4 check on the next line. The >0 check clearly intended to catch these as negative numbers. Spotted by inspection, and impossible to trigger given the shift widths that can be used. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@147773 91177308-0d34-0410-b5e6-96231b3b80d8
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@ -996,7 +996,7 @@ bool X86DAGToDAGISel::MatchAddressRecursively(SDValue N, X86ISelAddressMode &AM,
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// allows us to convert the shift and and into an h-register extract and
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// a scaled index.
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if (Shift.getOpcode() == ISD::SRL && Shift.hasOneUse()) {
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unsigned ScaleLog = 8 - C1->getZExtValue();
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int ScaleLog = 8 - C1->getZExtValue();
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if (ScaleLog > 0 && ScaleLog < 4 &&
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C2->getZExtValue() == (UINT64_C(0xff) << ScaleLog)) {
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SDValue Eight = CurDAG->getConstant(8, MVT::i8);
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