From 4e4e46143a4e9534ad8139c349ed84998f8df304 Mon Sep 17 00:00:00 2001 From: Chris Lattner Date: Mon, 7 Jan 2008 07:46:23 +0000 Subject: [PATCH] add a note git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@45698 91177308-0d34-0410-b5e6-96231b3b80d8 --- lib/Target/README.txt | 7 +++++++ 1 file changed, 7 insertions(+) diff --git a/lib/Target/README.txt b/lib/Target/README.txt index 284be24b679..26bc5e83191 100644 --- a/lib/Target/README.txt +++ b/lib/Target/README.txt @@ -2,6 +2,13 @@ Target Independent Opportunities: //===---------------------------------------------------------------------===// +We should make the various target's "IMPLICIT_DEF" instructions be a single +target-independent opcode like TargetInstrInfo::INLINEASM. This would allow +us to eliminate the TargetInstrDesc::isImplicitDef() method, and would allow +us to avoid having to define this for every target for every register class. + +//===---------------------------------------------------------------------===// + With the recent changes to make the implicit def/use set explicit in machineinstrs, we should change the target descriptions for 'call' instructions so that the .td files don't list all the call-clobbered registers as implicit