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ARM: do not add a regmask for TAILJUMPs
The jump doesn't really kill the registers, the following call does but we never get back anyway. This avoids some verify-machineinstrs problems when TAILJUMPs are if-converted. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@191962 91177308-0d34-0410-b5e6-96231b3b80d8
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@@ -1779,6 +1779,7 @@ ARMTargetLowering::LowerCall(TargetLowering::CallLoweringInfo &CLI,
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RegsToPass[i].second.getValueType()));
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RegsToPass[i].second.getValueType()));
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// Add a register mask operand representing the call-preserved registers.
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// Add a register mask operand representing the call-preserved registers.
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if (!isTailCall) {
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const uint32_t *Mask;
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const uint32_t *Mask;
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const TargetRegisterInfo *TRI = getTargetMachine().getRegisterInfo();
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const TargetRegisterInfo *TRI = getTargetMachine().getRegisterInfo();
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const ARMBaseRegisterInfo *ARI = static_cast<const ARMBaseRegisterInfo*>(TRI);
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const ARMBaseRegisterInfo *ARI = static_cast<const ARMBaseRegisterInfo*>(TRI);
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@@ -1797,6 +1798,7 @@ ARMTargetLowering::LowerCall(TargetLowering::CallLoweringInfo &CLI,
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assert(Mask && "Missing call preserved mask for calling convention");
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assert(Mask && "Missing call preserved mask for calling convention");
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Ops.push_back(DAG.getRegisterMask(Mask));
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Ops.push_back(DAG.getRegisterMask(Mask));
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}
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if (InFlag.getNode())
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if (InFlag.getNode())
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Ops.push_back(InFlag);
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Ops.push_back(InFlag);
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35
test/CodeGen/ARM/ifconv-regmask.ll
Normal file
35
test/CodeGen/ARM/ifconv-regmask.ll
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@@ -0,0 +1,35 @@
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; RUN: llc < %s -mtriple=thumbv7s-apple-ios6.0.0 -verify-machineinstrs
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%union.opcode = type { i32 }
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@opcode = external global %union.opcode, align 4
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; Function Attrs: nounwind ssp
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define i32 @sfu() {
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entry:
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%bf.load = load i32* getelementptr inbounds (%union.opcode* @opcode, i32 0, i32 0), align 4
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%bf.lshr = lshr i32 %bf.load, 26
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%bf.clear = and i32 %bf.lshr, 7
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switch i32 %bf.clear, label %return [
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i32 0, label %sw.bb
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i32 1, label %sw.bb1
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]
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sw.bb: ; preds = %entry
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%call = tail call i32 @func0()
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br label %return
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sw.bb1: ; preds = %entry
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%call2 = tail call i32 @func1()
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br label %return
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return: ; preds = %sw.bb1, %sw.bb, %entry
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%retval.0 = phi i32 [ %call2, %sw.bb1 ], [ %call, %sw.bb ], [ -1, %entry ]
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ret i32 %retval.0
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}
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; Function Attrs: nounwind ssp
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declare i32 @func0()
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; Function Attrs: nounwind ssp
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declare i32 @func1()
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