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Mark FPB as a reserved register when needed.

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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@205421 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Job Noorman 2014-04-02 13:13:56 +00:00
parent 5d853bf42d
commit 4e7ec2b053
2 changed files with 15 additions and 1 deletions
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4
lib/Target/MSP430/MSP430RegisterInfo.cpp
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@ -88,8 +88,10 @@ BitVector MSP430RegisterInfo::getReservedRegs(const MachineFunction &MF) const {
Reserved.set(MSP430::CGW);
// Mark frame pointer as reserved if needed.
if (TFI->hasFP(MF))
if (TFI->hasFP(MF)) {
Reserved.set(MSP430::FPB);
Reserved.set(MSP430::FPW);
}
return Reserved;
}

12
test/CodeGen/MSP430/fp.ll
View File

@ -15,3 +15,15 @@ entry:
; CHECK: pop.w r4
ret void
}
; Due to FPB not being marked as reserved, the register allocator used to select
; r4 as the register for the "r" constraint below. This test verifies that this
; does not happen anymore. Note that the only reason an ISR is used here is that
; the register allocator selects r4 first instead of fifth in a normal function.
define msp430_intrcc void @fpb_alloced() #0 {
; CHECK_LABEL: fpb_alloced:
; CHECK-NOT: mov.b #0, r4
; CHECK: nop
call void asm sideeffect "nop", "r"(i8 0)
ret void
}