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PowerPC: Canonicalize access to function attributes, NFC
Canonicalize access to function attributes to use the simpler API. getAttributes().getAttribute(AttributeSet::FunctionIndex, Kind) => getFnAttribute(Kind) getAttributes().hasAttribute(AttributeSet::FunctionIndex, Kind) => hasFnAttribute(Kind) git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@229224 91177308-0d34-0410-b5e6-96231b3b80d8
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@@ -442,8 +442,7 @@ unsigned PPCFrameLowering::determineFrameLayout(MachineFunction &MF,
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// to adjust the stack pointer (we fit in the Red Zone).
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// to adjust the stack pointer (we fit in the Red Zone).
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// The 32-bit SVR4 ABI has no Red Zone. However, it can still generate
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// The 32-bit SVR4 ABI has no Red Zone. However, it can still generate
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// stackless code if all local vars are reg-allocated.
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// stackless code if all local vars are reg-allocated.
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bool DisableRedZone = MF.getFunction()->getAttributes().
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bool DisableRedZone = MF.getFunction()->hasFnAttribute(Attribute::NoRedZone);
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hasAttribute(AttributeSet::FunctionIndex, Attribute::NoRedZone);
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unsigned LR = RegInfo->getRARegister();
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unsigned LR = RegInfo->getRARegister();
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if (!DisableRedZone &&
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if (!DisableRedZone &&
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(Subtarget.isPPC64() || // 32-bit SVR4, no stack-
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(Subtarget.isPPC64() || // 32-bit SVR4, no stack-
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@@ -507,8 +506,7 @@ bool PPCFrameLowering::needsFP(const MachineFunction &MF) const {
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// Naked functions have no stack frame pushed, so we don't have a frame
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// Naked functions have no stack frame pushed, so we don't have a frame
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// pointer.
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// pointer.
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if (MF.getFunction()->getAttributes().hasAttribute(
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if (MF.getFunction()->hasFnAttribute(Attribute::Naked))
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AttributeSet::FunctionIndex, Attribute::Naked))
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return false;
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return false;
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return MF.getTarget().Options.DisableFramePointerElim(MF) ||
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return MF.getTarget().Options.DisableFramePointerElim(MF) ||
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@@ -7181,8 +7181,7 @@ PPCTargetLowering::emitEHSjLjSetJmp(MachineInstr *MI,
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// Naked functions never have a base pointer, and so we use r1. For all
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// Naked functions never have a base pointer, and so we use r1. For all
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// other functions, this decision must be delayed until during PEI.
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// other functions, this decision must be delayed until during PEI.
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unsigned BaseReg;
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unsigned BaseReg;
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if (MF->getFunction()->getAttributes().hasAttribute(
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if (MF->getFunction()->hasFnAttribute(Attribute::Naked))
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AttributeSet::FunctionIndex, Attribute::Naked))
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BaseReg = Subtarget.isPPC64() ? PPC::X1 : PPC::R1;
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BaseReg = Subtarget.isPPC64() ? PPC::X1 : PPC::R1;
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else
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else
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BaseReg = Subtarget.isPPC64() ? PPC::BP8 : PPC::BP;
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BaseReg = Subtarget.isPPC64() ? PPC::BP8 : PPC::BP;
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@@ -9721,8 +9720,7 @@ SDValue PPCTargetLowering::LowerFRAMEADDR(SDValue Op,
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// Naked functions never have a frame pointer, and so we use r1. For all
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// Naked functions never have a frame pointer, and so we use r1. For all
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// other functions, this decision must be delayed until during PEI.
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// other functions, this decision must be delayed until during PEI.
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unsigned FrameReg;
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unsigned FrameReg;
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if (MF.getFunction()->getAttributes().hasAttribute(
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if (MF.getFunction()->hasFnAttribute(Attribute::Naked))
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AttributeSet::FunctionIndex, Attribute::Naked))
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FrameReg = isPPC64 ? PPC::X1 : PPC::R1;
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FrameReg = isPPC64 ? PPC::X1 : PPC::R1;
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else
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else
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FrameReg = isPPC64 ? PPC::FP8 : PPC::FP;
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FrameReg = isPPC64 ? PPC::FP8 : PPC::FP;
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@@ -821,8 +821,7 @@ PPCRegisterInfo::eliminateFrameIndex(MachineBasicBlock::iterator II,
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// to Offset to get the correct offset.
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// to Offset to get the correct offset.
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// Naked functions have stack size 0, although getStackSize may not reflect that
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// Naked functions have stack size 0, although getStackSize may not reflect that
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// because we didn't call all the pieces that compute it for naked functions.
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// because we didn't call all the pieces that compute it for naked functions.
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if (!MF.getFunction()->getAttributes().
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if (!MF.getFunction()->hasFnAttribute(Attribute::Naked)) {
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hasAttribute(AttributeSet::FunctionIndex, Attribute::Naked)) {
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if (!(hasBasePointer(MF) && FrameIndex < 0))
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if (!(hasBasePointer(MF) && FrameIndex < 0))
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Offset += MFI->getStackSize();
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Offset += MFI->getStackSize();
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}
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}
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@@ -928,10 +927,8 @@ bool PPCRegisterInfo::needsStackRealignment(const MachineFunction &MF) const {
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const MachineFrameInfo *MFI = MF.getFrameInfo();
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const MachineFrameInfo *MFI = MF.getFrameInfo();
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const Function *F = MF.getFunction();
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const Function *F = MF.getFunction();
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unsigned StackAlign = Subtarget.getFrameLowering()->getStackAlignment();
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unsigned StackAlign = Subtarget.getFrameLowering()->getStackAlignment();
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bool requiresRealignment =
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bool requiresRealignment = ((MFI->getMaxAlignment() > StackAlign) ||
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((MFI->getMaxAlignment() > StackAlign) ||
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F->hasFnAttribute(Attribute::StackAlignment));
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F->getAttributes().hasAttribute(AttributeSet::FunctionIndex,
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Attribute::StackAlignment));
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return requiresRealignment && canRealignStack(MF);
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return requiresRealignment && canRealignStack(MF);
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}
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}
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@@ -162,11 +162,8 @@ PPC64TargetMachine::PPC64TargetMachine(const Target &T, StringRef TT,
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const PPCSubtarget *
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const PPCSubtarget *
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PPCTargetMachine::getSubtargetImpl(const Function &F) const {
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PPCTargetMachine::getSubtargetImpl(const Function &F) const {
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AttributeSet FnAttrs = F.getAttributes();
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Attribute CPUAttr = F.getFnAttribute("target-cpu");
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Attribute CPUAttr =
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Attribute FSAttr = F.getFnAttribute("target-features");
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FnAttrs.getAttribute(AttributeSet::FunctionIndex, "target-cpu");
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Attribute FSAttr =
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FnAttrs.getAttribute(AttributeSet::FunctionIndex, "target-features");
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std::string CPU = !CPUAttr.hasAttribute(Attribute::None)
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std::string CPU = !CPUAttr.hasAttribute(Attribute::None)
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? CPUAttr.getValueAsString().str()
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? CPUAttr.getValueAsString().str()
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