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PowerPC: Canonicalize access to function attributes, NFC

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Canonicalize access to function attributes to use the simpler API.

getAttributes().getAttribute(AttributeSet::FunctionIndex, Kind)
  => getFnAttribute(Kind)

getAttributes().hasAttribute(AttributeSet::FunctionIndex, Kind)
  => hasFnAttribute(Kind)

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@229224 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Duncan P. N. Exon Smith
2015-02-14 02:54:07 +00:00
parent 2d925cbe10
commit 4eba62d6c2
4 changed files with 9 additions and 19 deletions
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6
lib/Target/PowerPC/PPCFrameLowering.cpp
View File

@@ -442,8 +442,7 @@ unsigned PPCFrameLowering::determineFrameLayout(MachineFunction &MF,
// to adjust the stack pointer (we fit in the Red Zone). // to adjust the stack pointer (we fit in the Red Zone).
// The 32-bit SVR4 ABI has no Red Zone. However, it can still generate // The 32-bit SVR4 ABI has no Red Zone. However, it can still generate
// stackless code if all local vars are reg-allocated. // stackless code if all local vars are reg-allocated.
bool DisableRedZone = MF.getFunction()->getAttributes(). bool DisableRedZone = MF.getFunction()->hasFnAttribute(Attribute::NoRedZone);
hasAttribute(AttributeSet::FunctionIndex, Attribute::NoRedZone);
unsigned LR = RegInfo->getRARegister(); unsigned LR = RegInfo->getRARegister();
if (!DisableRedZone && if (!DisableRedZone &&
(Subtarget.isPPC64() || // 32-bit SVR4, no stack- (Subtarget.isPPC64() || // 32-bit SVR4, no stack-
@@ -507,8 +506,7 @@ bool PPCFrameLowering::needsFP(const MachineFunction &MF) const {
// Naked functions have no stack frame pushed, so we don't have a frame // Naked functions have no stack frame pushed, so we don't have a frame
// pointer. // pointer.
if (MF.getFunction()->getAttributes().hasAttribute( if (MF.getFunction()->hasFnAttribute(Attribute::Naked))
AttributeSet::FunctionIndex, Attribute::Naked))
return false; return false;
return MF.getTarget().Options.DisableFramePointerElim(MF) || return MF.getTarget().Options.DisableFramePointerElim(MF) ||

6
lib/Target/PowerPC/PPCISelLowering.cpp
View File

@@ -7181,8 +7181,7 @@ PPCTargetLowering::emitEHSjLjSetJmp(MachineInstr *MI,
// Naked functions never have a base pointer, and so we use r1. For all // Naked functions never have a base pointer, and so we use r1. For all
// other functions, this decision must be delayed until during PEI. // other functions, this decision must be delayed until during PEI.
unsigned BaseReg; unsigned BaseReg;
if (MF->getFunction()->getAttributes().hasAttribute( if (MF->getFunction()->hasFnAttribute(Attribute::Naked))
AttributeSet::FunctionIndex, Attribute::Naked))
BaseReg = Subtarget.isPPC64() ? PPC::X1 : PPC::R1; BaseReg = Subtarget.isPPC64() ? PPC::X1 : PPC::R1;
else else
BaseReg = Subtarget.isPPC64() ? PPC::BP8 : PPC::BP; BaseReg = Subtarget.isPPC64() ? PPC::BP8 : PPC::BP;
@@ -9721,8 +9720,7 @@ SDValue PPCTargetLowering::LowerFRAMEADDR(SDValue Op,
// Naked functions never have a frame pointer, and so we use r1. For all // Naked functions never have a frame pointer, and so we use r1. For all
// other functions, this decision must be delayed until during PEI. // other functions, this decision must be delayed until during PEI.
unsigned FrameReg; unsigned FrameReg;
if (MF.getFunction()->getAttributes().hasAttribute( if (MF.getFunction()->hasFnAttribute(Attribute::Naked))
AttributeSet::FunctionIndex, Attribute::Naked))
FrameReg = isPPC64 ? PPC::X1 : PPC::R1; FrameReg = isPPC64 ? PPC::X1 : PPC::R1;
else else
FrameReg = isPPC64 ? PPC::FP8 : PPC::FP; FrameReg = isPPC64 ? PPC::FP8 : PPC::FP;

9
lib/Target/PowerPC/PPCRegisterInfo.cpp
View File

@@ -821,8 +821,7 @@ PPCRegisterInfo::eliminateFrameIndex(MachineBasicBlock::iterator II,
// to Offset to get the correct offset. // to Offset to get the correct offset.
// Naked functions have stack size 0, although getStackSize may not reflect that // Naked functions have stack size 0, although getStackSize may not reflect that
// because we didn't call all the pieces that compute it for naked functions. // because we didn't call all the pieces that compute it for naked functions.
if (!MF.getFunction()->getAttributes(). if (!MF.getFunction()->hasFnAttribute(Attribute::Naked)) {
hasAttribute(AttributeSet::FunctionIndex, Attribute::Naked)) {
if (!(hasBasePointer(MF) && FrameIndex < 0)) if (!(hasBasePointer(MF) && FrameIndex < 0))
Offset += MFI->getStackSize(); Offset += MFI->getStackSize();
} }
@@ -928,10 +927,8 @@ bool PPCRegisterInfo::needsStackRealignment(const MachineFunction &MF) const {
const MachineFrameInfo *MFI = MF.getFrameInfo(); const MachineFrameInfo *MFI = MF.getFrameInfo();
const Function *F = MF.getFunction(); const Function *F = MF.getFunction();
unsigned StackAlign = Subtarget.getFrameLowering()->getStackAlignment(); unsigned StackAlign = Subtarget.getFrameLowering()->getStackAlignment();
bool requiresRealignment = bool requiresRealignment = ((MFI->getMaxAlignment() > StackAlign) ||
((MFI->getMaxAlignment() > StackAlign) || F->hasFnAttribute(Attribute::StackAlignment));
F->getAttributes().hasAttribute(AttributeSet::FunctionIndex,
Attribute::StackAlignment));
return requiresRealignment && canRealignStack(MF); return requiresRealignment && canRealignStack(MF);
} }

7
lib/Target/PowerPC/PPCTargetMachine.cpp
View File

@@ -162,11 +162,8 @@ PPC64TargetMachine::PPC64TargetMachine(const Target &T, StringRef TT,
const PPCSubtarget * const PPCSubtarget *
PPCTargetMachine::getSubtargetImpl(const Function &F) const { PPCTargetMachine::getSubtargetImpl(const Function &F) const {
AttributeSet FnAttrs = F.getAttributes(); Attribute CPUAttr = F.getFnAttribute("target-cpu");
Attribute CPUAttr = Attribute FSAttr = F.getFnAttribute("target-features");
FnAttrs.getAttribute(AttributeSet::FunctionIndex, "target-cpu");
Attribute FSAttr =
FnAttrs.getAttribute(AttributeSet::FunctionIndex, "target-features");
std::string CPU = !CPUAttr.hasAttribute(Attribute::None) std::string CPU = !CPUAttr.hasAttribute(Attribute::None)
? CPUAttr.getValueAsString().str() ? CPUAttr.getValueAsString().str()