diff --git a/lib/Target/IA64/IA64RegisterInfo.td b/lib/Target/IA64/IA64RegisterInfo.td index 9534d2489bf..148ecb7eb3e 100644 --- a/lib/Target/IA64/IA64RegisterInfo.td +++ b/lib/Target/IA64/IA64RegisterInfo.td @@ -234,9 +234,8 @@ def B6 : GR<0, "b6">; // in IA64RegisterInfo.cpp def GR : RegisterClass; + r120, r121, r122, r123, r124, r125, r126, r127, + r0, r1, r2, r12, r13, r15, r22]> // these last 7 are special (look down) + + { + let Methods = [{ + iterator allocation_order_end(MachineFunction &MF) const { + return end()-7; // 7 special registers + } + }]; +} + // these are the scratch (+stacked) FP registers // ZERO (F0) and ONE (F1) are not here